?? test.fit.qmsg
字號:
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Info: Started Fast Input/Output/OE register processing" { } { } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Info: Finished Fast Input/Output/OE register processing" { } { } 0}
{ "Info" "IFSAC_FSAC_START_MAC_SCAN_CHAIN_INFERENCING" "" "Info: Start inferring scan chains for DSP blocks" { } { } 0}
{ "Info" "IFSAC_FSAC_FINISH_MAC_SCAN_CHAIN_INFERENCING" "" "Info: Inferring scan chains for DSP blocks is complete" { } { } 0}
{ "Info" "IFYGR_FYGR_INFO_AUTO_MODE_REGISTER_PACKING" "Auto Normal " "Info: Fitter is using Normal packing mode for logic elements with Auto setting for Auto Packed Registers logic option" { } { } 0}
{ "Info" "IFSAC_FSAC_START_LUT_IO_MAC_RAM_PACKING" "" "Info: Moving registers into I/O cells, LUTs, RAM blocks, and DSP blocks to improve timing and density" { } { } 0}
{ "Info" "IFSAC_FSAC_FINISH_LUT_IO_MAC_RAM_PACKING" "" "Info: Finished moving registers into LUTs, I/O cells, DSP blocks, and RAM blocks" { } { } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Info: Finished register packing" { } { } 0}
{ "Info" "IFSAC_FSAC_IO_BANK_PIN_GROUP_STATISTICS" "I/O pins that need to be placed that use the same VCCIO and VREF, before I/O pin placement " "Info: Statistics of I/O pins that need to be placed that use the same VCCIO and VREF, before I/O pin placement" { { "Info" "IFSAC_FSAC_SINGLE_IOC_GROUP_STATISTICS" "17 unused 3.30 1 16 0 " "Info: Number of I/O pins in group: 17 (unused VREF, 3.30 VCCIO, 1 input, 16 output, 0 bidirectional)" { { "Info" "IFSAC_FSAC_IO_STDS_IN_IOC_GROUP" "LVTTL. " "Info: I/O standards used: LVTTL." { } { } 0} } { } 0} } { } 0}
{ "Info" "IFSAC_FSAC_IO_STATS_BEFORE_AFTER_PLACEMENT" "before " "Info: I/O bank details before I/O pin placement" { { "Info" "IFSAC_FSAC_IO_BANK_PIN_GROUP_STATISTICS" "I/O banks " "Info: Statistics of I/O banks" { { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "1 does not use unused 0 31 " "Info: I/O bank number 1 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used -- 31 pins available" { } { } 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "2 does not use unused 0 32 " "Info: I/O bank number 2 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used -- 32 pins available" { } { } 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "3 does not use unused 0 51 " "Info: I/O bank number 3 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used -- 51 pins available" { } { } 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "4 does not use unused 1 60 " "Info: I/O bank number 4 does not use VREF pins and has unused VCCIO pins. 1 total pin(s) used -- 60 pins available" { } { } 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "5 does not use unused 0 31 " "Info: I/O bank number 5 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used -- 31 pins available" { } { } 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "6 does not use unused 0 31 " "Info: I/O bank number 6 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used -- 31 pins available" { } { } 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "7 does not use unused 0 61 " "Info: I/O bank number 7 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used -- 61 pins available" { } { } 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "8 does not use unused 0 51 " "Info: I/O bank number 8 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used -- 51 pins available" { } { } 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "9 does not use unused 0 6 " "Info: I/O bank number 9 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used -- 6 pins available" { } { } 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "10 does not use unused 0 0 " "Info: I/O bank number 10 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used -- 0 pins available" { } { } 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "11 does not use unused 0 6 " "Info: I/O bank number 11 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used -- 6 pins available" { } { } 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "12 does not use unused 0 0 " "Info: I/O bank number 12 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used -- 0 pins available" { } { } 0} } { } 0} } { } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Info: Fitter placement preparation operations beginning" { } { } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:00 " "Info: Fitter placement preparation operations ending: elapsed time is 00:00:00" { } { } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Info: Fitter placement operations beginning" { } { } 0}
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