A new PLL topology and a new simplified linear model are presented. The new fractional-N synthesizer presents no reference spurs and lowers the overall phase noise, thanks to the presence of a SampleJHold block. With a new simulation methodology it is possible to perform very accurate simulations, whose results match closely those obtained with the linear PLL model developed.
標(biāo)簽：
new
fractional-N
synthesizer
simplified
上傳時(shí)間：
2016-04-14
上傳用戶：hjshhyy
