The code performs a number (ITERS) of iterations of the Bailey s 6-step FFT algorithm (following the ideas in the CMU Task parallel suite). 1.- Generates an input signal vector (dgen) with size n=n1xn2 stored in row major order In this code the size of the input signal is NN=NxN (n=NN, n1=n2=N) 2.- Transpose (tpose) A to have it stored in column major order 3.- Perform independent FFTs on the rows (cffts) 4.- Scale each element of the resulting array by a factor of w[n]**(p*q) 5.- Transpose (tpose) to prepair it for the next step 6.- Perform independent FFTs on the rows (cffts) 7.- Transpose the resulting matrix The code requires nested Parallelism.
標簽： iterations performs Bailey number
上傳時間： 2014-01-05
上傳用戶：libenshu01
Microsoft Visual C++ is a programming environment used to create applications for the Microsoft Windows operating systems . To use this ebook , you must have installed either Microsoft Visual C++ 6.0 or Microsoft Visual Studio 6.0.
標簽： Microsoft applications environment programming
上傳時間： 2017-06-18
上傳用戶：huyiming139
This is the project README file. Here, you should describe your project. Tell the reader (someone who does not know anything about this project) all he/she needs to know. The comments should usually include at least:
標簽： project the describe someone
上傳時間： 2017-06-22
上傳用戶：450976175
NN Functions a program in Lisp to demonstrate working of an artificial neuron. (Enter an input vector X and weight vector W. Calculate weighted sum XW. Transform this using signal or activation functions like logistic, threshold, hyperbolic-tangent, linear, exponential, sigmoid or some other functions (syntax provided) and display the output).
標簽： demonstrate artificial Functions program
上傳時間： 2013-12-30
上傳用戶：hfmm633
本程序實現算術平均值濾波（采樣值為8位，連續采樣數目小于256) 入口參數：采樣值數據塊首地址在SADR中，連續采樣數在W中 出口參數：濾波值在SOU中.
上傳時間： 2013-12-17
上傳用戶：lx9076
C程序設計語言（第二版，中文版，B.W.Kernighan、D.M.Ritchie 著）
上傳時間： 2017-07-08
上傳用戶：1109003457
C05_LCD，LCD的DB0-7,RS,R/W,E與MCU的普通I/O口引腳連接，MCU的串口與PC方的串口相連，MCU接收PC發來的32個字符,并送LCD顯示
上傳時間： 2014-12-05
上傳用戶：ccclll
分布式異步傳感器無源定位中，使用窗口函數為w，定位估計的CRLB
上傳時間： 2017-07-18
上傳用戶：dragonhaixm
The FPGA can realize a more optimized Digital controller in DC/DC Converters when compare to DSPs. In this paper, based on the FPGA platform, The theoretical analysis, characteristics, simulation and design consideration are given. The methods to implement the digital DC/DC Converters have been researched. The function module, state machine of digital DC/DC controller and high resolution DPWM with Sigma- Delta dither has been introduced. They are verified by experiments on a 20 W, 300 KHz non-isolated synchronous buck converters.
標簽： Converters controller optimized Digital
上傳時間： 2013-12-31
上傳用戶：tzl1975
Blocking CoThe aim of this toolbox is to compute blocking probabilities in WDM networks. This work was based on [1], [2], [3], [4] and user is referred to those papers for deeper study. Because WDM networks are circuit switched loss networks blocking may occur because of lack of resources.Computation in WDM Networks Toolbox
標簽： probabilities Blocking blocking networks
上傳時間： 2014-01-14
上傳用戶：iswlkje
