The objective of this projectis to design, model and simulate an autocorrelation
generator circuit using 4-bit LFSR. the register and LFSR will used D flip-flop and some
gates. By the autocorrelation concept, there should be 2 same length vectors, for calculating
the autocorrelation , we have to design the register for storing the original vector and the
shifter for make time delay.
We have a group of N items (represented by integers from 1 to N), and we know that there is some total order defined for these items. You may assume that no two elements will be equal (for all a, b: a<b or b<a). However, it is expensive to compare two items. Your task is to make a number of comparisons, and then output the sorted order. The cost of determining if a < b is given by the bth integer of element a of costs (space delimited), which is the same as the ath integer of element b. Naturally, you will be judged on the total cost of the comparisons you make before outputting the sorted order. If your order is incorrect, you will receive a 0. Otherwise, your score will be opt/cost, where opt is the best cost anyone has achieved and cost is the total cost of the comparisons you make (so your score for a test case will be between 0 and 1). Your score for the problem will simply be the sum of your scores for the individual test cases.
漢諾塔！！！
Simulate the movement of the Towers of Hanoi puzzle Bonus is possible for using animation
eg. if n = 2 A→B A→C B→C
if n = 3 A→C A→B C→B A→C B→A B→C A→C
