日本动漫同人动漫在线观看,国产精品国产精品,国产精品对白刺激久久久

A題

Verilog HDL Synthesis, A Practical Primer

·Verilog HDL Synthesis, A Practical Primer

標(biāo)簽： nbsp Synthesis Practical Verilog

上傳時(shí)間： 2013-04-24

上傳用戶：muhongqing
A SystemC-Primer.pdf

資料->【E】光盤論文->【E5】英文書籍->A SystemC-Primer.pdf

標(biāo)簽： SystemC-Primer

上傳時(shí)間： 2013-04-24

上傳用戶：1583060504
02 calgary PhD A Java-Based Wireless Framework for Location-Based Services Applications.pdf

資料->【E】光盤論文->【E1】斯坦福博士論文->02 calgary PhD A Java-Based Wireless Framework for Location-Based Services Applications.pdf

標(biāo)簽： Location-Based Applications Java-Based Framework

上傳時(shí)間： 2013-07-02

上傳用戶：亞亞娟娟123
MSP430定時(shí)器A測(cè)量脈沖寬度

MSP430定時(shí)器A測(cè)量脈沖寬度附加程序和注釋詳解

標(biāo)簽： MSP 430 定時(shí)器測(cè)量

上傳時(shí)間： 2013-06-26

上傳用戶：372825274
使用VHDL語言編寫的A/D轉(zhuǎn)換程序

使用VHDL語言編寫的A/D轉(zhuǎn)換程序，可在FPGA平臺(tái)使用

標(biāo)簽： VHDL 語言編寫程序

上傳時(shí)間： 2013-08-06

上傳用戶：杏簾在望
This is a document for CYCLONE Develop Kits type LJ-FN300 FPGANIOS. Wish this would help you to find

This is a document for CYCLONE Develop Kits type LJ-FN300 FPGANIOS. Wish this would help you to find what kits can be select to use.

標(biāo)簽： FPGANIOS document CYCLONE Develop

上傳時(shí)間： 2013-08-16

上傳用戶：563686540
This brief introduce a kind of the framework construction to materialize the system. And an example

This brief introduce a kind of the framework construction to materialize the system. And an example was given with the discussion on the performence.

標(biāo)簽： construction materialize introduce framework

上傳時(shí)間： 2013-08-17

上傳用戶：ysystc699
this is a sample about usb out transmission

this is a sample about usb out transmission,it s default installation is D:\\RedLogic\\RCII_samples, and the software environment is quatrusII 5.0,it is usefull for studying hardware and usb.

標(biāo)簽： transmission sample about this

上傳時(shí)間： 2013-08-24

上傳用戶：座山雕牛逼
一篇關(guān)于CORDIC的文章A survey of CORDIC algorithms for FPGA based computers

一篇關(guān)于CORDIC的文章A survey of CORDIC algorithms for FPGA based computers

標(biāo)簽： CORDIC algorithms computers survey

上傳時(shí)間： 2013-08-31

上傳用戶：lliuhhui
采用FPGA模擬高動(dòng)態(tài)GPS信號(hào)源中的C／A碼產(chǎn)生器

本文：采用了FPGA方法來模擬高動(dòng)態(tài)(Global Position System GPS)信號(hào)源中的C／A碼產(chǎn)生器。C／A碼在GPS中實(shí)現(xiàn)分址、衛(wèi)星信號(hào)粗捕和精碼(P碼)引導(dǎo)捕獲起著重要的作用，通過硬件描述語言VERILOG在ISE中實(shí)現(xiàn)電路生成，采用MODELSIM、SYNPLIFY工具分別進(jìn)行仿真和綜合。

標(biāo)簽： FPGA GPS 模擬動(dòng)態(tài)

上傳時(shí)間： 2013-08-31

上傳用戶：pwcsoft