A badic controller for the UART. It incorporates a
-- transmit and receive FIFO (from Max+Plus II s MegaWizard
-- plug-in manager). Note that no checking is done to see
-- whether the FIFOs are overflowing or not. This strictly
-- handles the transmitting and receiving of the data.
UART 4 UART參考設計，Xilinx提供VHDL代碼 uart_vhdl
This zip file contains the following folders:
\vhdl_source -- Source VHDL files:
uart.vhd - top level file
txmit.vhd - transmit portion of uart
rcvr.vhd - - receive portion of uart
\vhdl_testfixture -- VHDL Testbench files. This files only include the testbench behavior, they
do not instantiate the DUT. This can easily be done in a top-level VHDL
file or a schematic. This folder contains the following files:
txmit_tb.vhd -- Test bench for txmit.vhd.
rcvr_tf.vhd -- Test bench for rcvr.vhd.
UART 4 UART參考設計，Xilinx提供VHDL代碼 uart_vhdl
This zip file contains the following folders:
\vhdl_source -- Source VHDL files:
uart.vhd - top level file
txmit.vhd - transmit portion of uart
rcvr.vhd - - receive portion of uart
\vhdl_testfixture -- VHDL Testbench files. This files only include the testbench behavior, they
do not instantiate the DUT. This can easily be done in a top-level VHDL
file or a schematic. This folder contains the following files:
txmit_tb.vhd -- Test bench for txmit.vhd.
rcvr_tf.vhd -- Test bench for rcvr.vhd.
UART I/O and Memory Allocation Example for GNU
The project GNU_IODemo shows how to use memory allocation routines (malloc) and char I/O (printf, scanf) via a serial interface with the GNU toolchain.
The I/O functions are adapted for the Analog Devices ADuC7000 series using the SERIAL.C module.
The example also shows the efficiency of the Keil CA ARM Compiler run-time library which is tuned for single chip systems.
// This program demonstrates how to configure the C8051F060 to write to and read
// from the UART interface. The program reads a word using the UART0 interrupts
// and outputs that word to the screen, with all characters in uppercase
// This program measures the voltage on an external ADC input and prints the
// result to a terminal window via the UART.
//
// The system is clocked using the internal 24.5MHz oscillator.
// Results are printed to the UART from a loop with the rate set by a delay
// based on Timer 2. This loop periodically reads the ADC value from a global
// variable, Result.
This transport driver for BlueDrekar middleware is a reference
implementation of the Bluetooth Host Controller Interface (HCI)
UART transport layer. The source code is compiled and run in linux enviroment.
