This document describes how to switch to and program the unisersal serial bus (USB) analog phase-locked loop (APLL) on the C5506/C5507/C5509A devices. Example assembly programs for programming and switching to and from the APLL are also provided in the attached zip file. It is assumed that the reader is familiar with the use and operation of the C5506/C5507/C5509A USB digital phase-locked loop (DPLL) and C55x™ Digital Signal Processor (DSP) IDLE procedures.
標(biāo)簽： describes unisersal document phase-lo
上傳時間： 2014-01-13
上傳用戶：hustfanenze
Commercially available active noise control headphones rely on fixed analog controllers to drive "anti-noise" loudspeakers. Our design uses an adaptive controller to optimally cancel unwanted acoustic noise. This headphone would be particularly useful for workers who operate or work near heavy machinery and engines because the noise is selectively eliminated. Desired sounds, such as speech and warning signals, are left to be heard clearly. The adaptive control algorithm is implemented on a Texas Instruments (TI™ ) 1 TMS320C30GEL digital signal processor (DSP), which drives a Sony CD550 headphone/microphone system. Our experiments indicate that adaptive noise control results in a dramatic improvement in performance over fixed noise control. This improvement is due to the availability of high-performance programmable DSPs and the self-optimizing and tracking capabilities of the adaptive controller in response to the surrounding noise.
標(biāo)簽： Commercially controllers headphones available
上傳時間： 2013-12-04
上傳用戶：dyctj
Use the on-board potentiometer to simulate an analog input,this input converted into a meaningful digital value in a microcontroller register, and use a group of LED to display this value.
標(biāo)簽： input potentiometer meaningful converted
上傳時間： 2017-09-25
上傳用戶：iswlkje
In this paper we revisit hybrid analog-digital precoding systems with emphasis on their modelling and radio-frequency (RF) losses, to realistically evaluate their benefits in 5G system implementations. For this, we decompose the analog beamforming networks (ABFN) as a bank of commonly used RF components and formulate realistic model constraints based on their S-parameters. Specifically, we concentrate on fully-connected ABFN (FC-ABFN) and Butler networks for implementing the discrete Fourier transform (DFT) in the RF domain. The results presented in this paper reveal that the performance and energy efficiency of hybrid precoding systems are severely affected, once practical factors are considered in the overall design. In this context, we also show that Butler RF networks are capable of providing better performances than FC-ABFN for systems with a large number of RF chains.
標(biāo)簽： Analog-Digital Precoding Hybrid
上傳時間： 2020-05-27
上傳用戶：shancjb
Designing withProgrammable Logicin an Analog WorldProgrammable logic devicesrevolutionized digital design over 25years ago, promising designers a blankchip to design literally any functionand program it in the field. PLDs canbe low-logic density devices that usenonvolatile sea-of-gates cells calledcomplex programmable logic devices(CPLDs) or they can be high-densitydevices based on SRAM look-up tables
標(biāo)簽： Solutions Analog Xilinx FPGAs
上傳時間： 2013-11-01
上傳用戶：a67818601
Designing withProgrammable Logicin an Analog WorldProgrammable logic devicesrevolutionized digital design over 25years ago, promising designers a blankchip to design literally any functionand program it in the field. PLDs canbe low-logic density devices that usenonvolatile sea-of-gates cells calledcomplex programmable logic devices(CPLDs) or they can be high-densitydevices based on SRAM look-up tables
標(biāo)簽： Solutions Analog Xilinx FPGAs
上傳時間： 2013-11-07
上傳用戶：suicone
he LPC932 can be used to create a Pulse Width Modulated PWM signal. That s an analog signal, with only 2 discrete levels, for example 0V and 5V and a constant period. The current value of this signal at a certain poiTnt of time is proportional to its Duty Cycle. That s the High Time during one period divided by the period. It can also be calculated as the average value during a particular period. That means after low pass filtering, (e.g. RC circuit) the signal becomes analog, with an actual value controlled by the microcontroller. The PWM functionality enables the LPC932 to control for example the speed of DC motors or the brightness of electric lighting.
標(biāo)簽： signal Modulated analog create
上傳時間： 2015-05-14
上傳用戶：CHINA526
The Audio File Library provides a uniform programming interface to standard digital audio file formats. This library allows the processing of audio data to and from audio files of many common formats (currently AIFF, AIFF-C, WAVE, NeXT/Sun .snd/.au, IRCAM, AVR, Amiga IFF/8SVX, and NIST SPHERE). The library also supports compression (currently G.711 mu-law and A-law and IMA and MS ADPCM) as well as PCM formats of all flavors (signed and unsigned integer, single- and double-precision floating point).
標(biāo)簽： programming interface provides standard
上傳時間： 2014-12-06
上傳用戶：a6697238
ETSI TS 101 699 Digital Video Broadcasting (DVB) Extensions to the Common Interface Specification
標(biāo)簽： Specification Broadcasting Extensions Interface
上傳時間： 2015-07-03
上傳用戶：ve3344
Programs to induce a naive possibilistic classifier (a possibilistic analog of the naive Bayes classifier) and to classify new data with an induced naive possibilistic classifier.
標(biāo)簽： possibilistic naive classifier Programs
上傳時間： 2015-07-12
上傳用戶：蟲蟲蟲蟲蟲蟲
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