Jitter is extremely important in systems using PLL-based clock drivers. The effects of jitter range from not having any effect on system operation to rendering the system completely non-functional. This application note provides the reader with a clear understanding of jitter in high-speed systems. It introduces the reader to various kinds of jitter in high-speed systems, their causes and their effects, and methods of reducing jitter. This application note will concentrate on jitter in PLL-based frequency synthesizers.
標(biāo)簽： extremely PLL-based important drivers
上傳時(shí)間： 2014-11-25
上傳用戶：asddsd
Cypress Semiconductor makes a variety of PLL-based clock generators. This application note provides a set of recommendations to optimize usage of Cypress clock devices in a system. The application note begins with recommended termination techniques for clock generators. Subsequently, power supply filtering and bypassing is discussed. Finally, the application note provides some recommendations on board layout.
標(biāo)簽： Semiconductor application generators PLL-based
上傳時(shí)間： 2013-12-20
上傳用戶：水中浮云
AN FPGA-BASED IMPLEMENTATION FOR MEDIAN FILTER MEETING THE REAL-TIME REQUIREMENTS OF AUTOMATED VISUAL INSPECTION SYSTEMS
標(biāo)簽： IMPLEMENTATION REQUIREMENTS FPGA-BASED AUTOMATED
上傳時(shí)間： 2013-12-13
上傳用戶：litianchu
Fractal Explorer GUI-based program for exploring and studying the most common form of fractals, chaotic systems and fractional dimension systems
標(biāo)簽： GUI-based exploring Explorer fractals
上傳時(shí)間： 2013-11-25
上傳用戶：ljmwh2000
Generates Rayleigh fading processes based on autoregressive models.
標(biāo)簽： autoregressive Generates processes Rayleigh
上傳時(shí)間： 2015-12-06
上傳用戶：無聊來刷下
The development of a data acquisition card based on USB bus is introduced in this article.It first describes the configuration and principle of this card in the part of hardware design,and then the application program and device driver in the part of software design.Data acquisition program in firmware is also discussed.Finally,this data acquisition card is tested and evaluated in a program developed by Lab Windows CVI,which shows that this car is stable and reliable
標(biāo)簽： development acquisition introduced article
上傳時(shí)間： 2015-12-07
上傳用戶：lijianyu172
IPCAM Design document based on TI DaVinci
標(biāo)簽： document DaVinci Design IPCAM
上傳時(shí)間： 2013-12-26
上傳用戶：songrui
In a preemptive priority based RTOS, priority inversion problem is among the major sources of deadline violations. Priority inheritance protocol is one of the approaches to reduce priority inversion. Unfortunately, RTOS like uC/OS can’t support priority inheritance protocol since it does not allow kernel to have multiple tasks at the same priority. Although it has different ways to avoid priority inversion such as priority ceiling protocol, developers still have some difficulties in programming real time applications with it. In this paper, we redesign the uC/OS kernel to provide the ability to support round robin scheduling and implement priority inheritance semaphore on the modified kernel. As result, we port new kernel with priority inheritance semaphore to evaluation board, and evaluate the execution time of each of the kernel service as well as verify the operations of our implementation.
標(biāo)簽： priority preemptive inversion problem
上傳時(shí)間： 2015-12-14
上傳用戶：氣溫達(dá)上千萬的
基于DDS的信號發(fā)生器的設(shè)計(jì)與開發(fā) The Design and Development of Function Generator Based on DDS
標(biāo)簽： Development DDS Generator Function
上傳時(shí)間： 2014-01-03
上傳用戶：stewart·
一般使用PC Based Controller 都是當(dāng)作現(xiàn)場設(shè)備的一種，也就是要接受 主系統(tǒng)的命令，做一些操作控制。以Modbus 來看屬于Slave 的角色，隨 時(shí)等待接收Modbus Master 的Query Message，然后依據(jù)內(nèi)容做控制，最后 將控制結(jié)果以Response Message 回傳。本章將以ICP 7524 及ICP 7188E5 等 兩種設(shè)備分別設(shè)計(jì)Modbus RTU、ASCII 及Modbus/TCP 的Slave 應(yīng)用程序， 讀者可以將此兩種程序的架構(gòu)再延伸設(shè)計(jì)至各種實(shí)際應(yīng)用程序。
標(biāo)簽： Controller Based 現(xiàn)場設(shè)備
上傳時(shí)間： 2015-12-16
上傳用戶：nanxia
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