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Android-smart-phone-platform

  • 智能天線技術在基站中的應用

    為了能夠滿足基站易于選址、優質快速的建站要求和易維護、低成本、高可靠的運行要求,本文對以方艙來實現一體化結構基站做出一番探討。從系統設計的觀點闡述了移動通信高性能基站天線設計的幾個關鍵問題,介紹了智能天線技術在基站中的應用,并且用HFSS軟件仿真了一種新型的對稱陣子天線,該天線駐波比小于2的帶寬可以達到60%,具有良好的寬頻帶特性。 Abstract:  In order to meet the station construction requirement of easy site selection and fast base station, and meet the operational requirement of easy maintenance, low cost and high reliability, this paper discussed the unified architecture base station using shelter. Several key problems of high performance mobile communication base station antenna were illustrated from the view of system design, the application of smart antenna in base station was also introduced. And a novel dipole antenna was simulated by using HFSS, the VSWR of the antenna is less than 2, and the bandwidth was reach to 60%. So it has good broadband properties.

    標簽: 智能天線 基站 中的應用

    上傳時間: 2013-11-20

    上傳用戶:linlin

  • UHF讀寫器設計中的FM0解碼技術

       針對UHF讀寫器設計中,在符合EPC Gen2標準的情況下,對標簽返回的高速數據進行正確解碼以達到正確讀取標簽的要求,提出了一種新的在ARM平臺下采用邊沿捕獲統計定時器數判斷數據的方法,并對FM0編碼進行解碼。與傳統的使用定時器定時采樣高低電平的FM0解碼方法相比,該解碼方法可以減少定時器定時誤差累積的影響;可以將捕獲定時器數中斷與數據判斷解碼相對分隔開,使得中斷對解碼影響很小,實現捕獲與解碼的同步。通過實驗表明,這種方法提高了解碼的效率,在160 Kb/s的接收速度下,讀取一張標簽的時間約為30次/s。 Abstract:  Aiming at the requirement of receiving correctly decoded data from the tag under high-speed communication which complied with EPC Gen2 standard in the design of UHF interrogator, the article introduced a new technology for FM0 decoding which counted the timer counter to judge data by using the edge interval of signal capture based on the ARM7 platform. Compared with the traditional FM0 decoding method which used the timer timed to sample the high and low level, the method could reduce the accumulation of timing error and could relatively separate capture timer interrupt and the data judgment for decoding, so that the disruption effect on the decoding was small and realizd synchronization of capture and decoding. Testing result shows that the method improves the efficiency of decoding, at 160 Kb/s receiving speed, the time of the interrogator to read a tag is about 30 times/s.

    標簽: UHF FM0 讀寫器 解碼技術

    上傳時間: 2013-11-10

    上傳用戶:liufei

  • 基于ARM的遠程無線視頻監控終端設計

    提出了一種以ARM微處理器為控制核心的遠程無線視頻監控終端的設計方案,其監控終端的硬件設計包括視頻采集處理、中央管理控制、無線傳輸3個模塊。并給出了監控終端的軟件開發平臺和開發模式的系統啟動代碼、嵌入式Linux系統移植以及驅動程序和應用程序。測試結果表明,該監控終端設計方案合理、有效,基本滿足監控需求。 Abstract:  A remote wireless video monitoring terminal design, which uses ARM microprocessor as its core control, is proposed in this paper.The hardware design of monitoring terminal system is composed of the video acquisition and processing module, the central management and control module, wireless transmission module.Meanwhile the monitoring terminal-s software development platform and development patterns are designed. Also the design of the system-s start codes, embedded Linux system-s transplantation process, driver and the corresponding applications are given. The results showed that the monitoring terminal design is reasonable, effective, basically meet monitoring requirements.

    標簽: ARM 遠程無線 視頻監控 終端設計

    上傳時間: 2013-11-13

    上傳用戶:wanqunsheng

  • Android手機刷機教程合集

    刷機教程

    標簽: Android 手機刷機 教程

    上傳時間: 2013-10-23

    上傳用戶:shen1230

  • Android平臺ROM的定制及精簡教程

    很牛逼啊

    標簽: Android ROM 定制 教程

    上傳時間: 2014-12-31

    上傳用戶:417313137

  • Android手機刷機教程合集

    刷機教程

    標簽: Android 手機刷機 教程

    上傳時間: 2013-11-03

    上傳用戶:3到15

  • Android平臺ROM的定制及精簡教程

    很牛逼啊

    標簽: Android ROM 定制 教程

    上傳時間: 2013-10-14

    上傳用戶:himbly

  • 簡化FPGA配置設計過程

    本文著重介紹了 Xilinx Platform Flash PROM 如何幫助系統和電路板設計人員簡化 FPGA 配置設計。用于配置 FPGA 的可選解決方案有很多,但它們通常都需要大量的前期設計工作和時間。Platform Flash 是為配置 Xilinx FPGA 專門設計的一款包括硬件和軟件支持在內的整體解決方案。  

    標簽: FPGA 過程

    上傳時間: 2014-01-09

    上傳用戶:時代電子小智

  • 面向Eclips的Nios II軟件構建工具手冊

    面向Eclips的Nios II軟件構建工具手冊 The Nios® II Software Build Tools (SBT) for Eclipse™ is a set of plugins based on the Eclipse™ framework and the Eclipse C/C++ development toolkit (CDT) plugins. The Nios II SBT for Eclipse provides a consistent development platform that works for all Nios II embedded processor systems. You can accomplish all Nios II software development tasks within Eclipse, including creating, editing, building, running, debugging, and profiling programs.

    標簽: Eclips Nios 軟件

    上傳時間: 2013-11-02

    上傳用戶:瓦力瓦力hong

  • Xilinx的Zynq可擴展式處理平臺(EPP)電子教材

    Abstract: This reference design explains how to power the Xilinx Zynq Extensible Processing Platform (EPP) and peripheral ICs using

    標簽: Xilinx Zynq EPP 擴展式

    上傳時間: 2013-10-13

    上傳用戶:peterli123456

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