介紹基于VHDL的微型打印機控制器的設計。論述了微型打印機的基本原理，以及實現(xiàn)控制器的VHDL語言設計。打印機的數(shù)據(jù)來自系統(tǒng)中的存儲模塊，根據(jù)需要控制打印。該微型打印機控制器可取代傳統(tǒng)的微型打印機,且抗干擾性好,可靠性高，具有較強的移植性，稍加改動就可應用于不同場合。 Abstract: This paper introduced the design method of micro printer controller based on VHDL.The basic principles of microprinter is explained,as well as the realization of the controller by VHDL language.The printer data is from the system memory modules,can control printer.The design of microprinter controller has antigood and high reliability，it can replace the traditional printer.The controller has very good portability,and need little modify that can use in different situation.
上傳時間： 2013-11-03
上傳用戶：dudu1210004
Mega16是一款采用先進RISC精簡指令，內(nèi)置A/D的8位單片機，可支持低電壓聯(lián)機 Flash和EEPROM 寫入功能；同時還支持 Basic和C 等高級語言編程。用它設計電子時鐘不僅成本低，硬件簡單，而且很容易實現(xiàn)系統(tǒng)移植。介紹了如何利用AVR系列單片機Mega16及1602字符液晶來設計電子時鐘的方法，同時給出了相應的電路原理及部分語言程序。 Abstract: ?Mega16 is a high-performance, low power consumption, the use of advanced RISC concise instructions, built-in A/D 8-bit microcontrollers, the on-line support for low-voltage Flash, EEPROM write function. Except Mega16 also support the Basic, C, and other high-level language programming.The electronic clock which is deisgned by Mega16 is not only low-cost, simple hardware, but easy to achieve system migration.The design method of electrioic clock based on the AVR Mega16 and character LCD1602 is introduced in this paper,and the corresponding circuit electrionic and some language program are given.
上傳時間： 2014-12-27
上傳用戶：zl5712176
介紹了基于單片機C8051F020的通用串口適配器的設計與實現(xiàn)方法，即由單片機控制的智能化一對多口收發(fā)信號轉換器。通過采用C51對單片機進行編程，控制與RS-232（標準RS-232電平）、RS232(TTL電平)、RS-422接口的數(shù)據(jù)通信；采用C++ Builder作為開發(fā)平臺，通過RS-232接口實現(xiàn)上位機對適配器各個通信端口的控制。 Abstract: Design and realization of a universal serial port adapter based on the MCU C8051F020 are introduced.The adapter is an intelligent one-to-more receiving and transmitting signal converter controlled by the MCU. By programming the MCU with the language C51,MCU control data communication between the MCU and RS-232(RS-232 level),RS-232(TTL level),RS-422 port; Using C++ Builder as the development plane, by one RS232 port, the upper PC can control each of the communication port of the adapter.
上傳時間： 2013-11-19
上傳用戶：hebanlian
1.The C Programming Language is a powerful, flexible andpotentially portable high-level programming language. 2.The C language may be used successfully to create a programfor an 8-bit MCU, but to produce the most efficient machinecode, the programmer must carefully construct the C Languageprogram.3.The programmer must not only create an efficient high leveldesign, but also pay attention to the detailed implementation.
上傳時間： 2013-12-27
上傳用戶：huanglang
匯編器在微處理器的驗證和應用中舉足輕重，如何設計通用的匯編器一直是研究的熱點之一。本文提出了一種開放式的匯編器系統(tǒng)設計思想，在匯編語言與機器語言間插入中間代碼CMDL（code mapping description language）語言，打破匯編語言與機器語言的直接映射關系，由此建立起一套描述匯編語言與機器語言的開放式映射體系。基于此開放式映射體系開發(fā)了一套匯編器系統(tǒng)，具有較高層次上的通用性和可移植性。【關鍵詞】指令集，CMDL，匯編器，開放式 Design of Retargetable Assembler System Liu Ling Feng Wen Nan Wang Ying Chun Jiang An Ping Ji Li Jiu IME of Peking University, 100871【摘要】An assembler plays a very important role in the field of microprocessor verifications and applications, thus how to build a retargetable assembler system has been a hotspot in this field for long time. This paper presents a new method about the retargetable assembler system design.It provides a kind of language CMDL, code mapping description language. During the process of assembling, assembler languages are firstly translated to CMDL, and then mapped to the machine codes. In an other word, CMDL is inserted between assembler languages and machine codes during the translation procedure. As a medium code, CMDL has a lot of features, such as high extraction, strong descript capabilities. It can describe almost all attributes of assembler languages. By breaking the direct mapping relationship between assembler languages and machine codes, the complexities of machine codes are hided to the users, therefore, the new retargetable assembler system has higher retargetable level by converting the mapping from assembler languages and machine codes to assembler languages and CMDL, and implementationof it becomes easier. Based on the new mapping system structure, a retargetable assemblersystem is developed. It proved the whole system has good retargetability and implantability.【關鍵詞】instruction set, symbol table, assembler, lexical analysis, retargetability
上傳時間： 2013-10-10
上傳用戶：meiguiweishi
MSP430系列單片機C語言程序設計與開發(fā)MSP430系列是一個具有明顯技術特色的單片機品種。關于它的硬件特性及匯編語言程序設計已在《MSP430系列超低功耗16位單片機的原理與應用》及《MSP430系列 FLASH型超低功耗16位單片機》等書中作了全面介紹。《MSP430系列單片機C語言程序設計與開發(fā)》介紹IAR公司為MSP430系列單片機配備的C程序設計語言C430。書中敘述了C語言的基本概念、C430的擴展特性及C庫函數(shù)；對C430的集成開發(fā)環(huán)境的使用及出錯信息作了詳盡的說明；并以MSP430F149為例，對各種應用問題及外圍模塊操作提供了典型的C程序例程，供讀者在今后的C430程序設計中參考。 《MSP430系列單片機C語言程序設計與開發(fā)》可以作為高等院校計算機、自動化及電子技術類專業(yè)的教學參考書，也可作為工程技術人員設計開發(fā)時的技術資料。MSP430系列超低功耗16位單片機的原理與應用目錄MSP430系列單片機C語言程序設計與開發(fā) 目錄 第1章 C語言基本知識1.1 標識符與關鍵字11.1.1 標識符11.1.2 關鍵字11.2 數(shù)據(jù)基本類型21.2.1 整型數(shù)據(jù)21.2.2 實型數(shù)據(jù)31.2.3 字符型數(shù)據(jù)41.2.4 各種數(shù)據(jù)轉換關系61.3 C語言的運算符71.3.1 算術運算符71.3.2 關系運算符和邏輯運算符71.3.3 賦值運算符81.3.4 逗號運算符81.3.5 ? 與 ：運算符81.3.6 強制轉換運算符91.3.7 各種運算符優(yōu)先級列表91.4 程序設計的三種基本結構101.4.1 語句的概念101.4.2 順序結構111.4.3 選擇結構121.4.4 循環(huán)結構141.5 函數(shù)181.5.1 函數(shù)定義181.5.2 局部變量與全局變量191.5.3 形式參數(shù)與實際參數(shù)201.5.4 函數(shù)調(diào)用方式201.5.5 函數(shù)嵌套調(diào)用211.5.6 變量的存儲類別221.5.7 內(nèi)部函數(shù)和外部函數(shù)231.6 數(shù)組231.6.1 一維數(shù)組241.6.2 多維數(shù)組241.6.3 字符數(shù)組261.7 指針271.7.1 指針與地址的概念271.7.2 指針變量的定義281.7.3 指針變量的引用281.7.4 數(shù)組的指針281.7.5 函數(shù)的指針301.7.6 指針數(shù)組311.8 結構和聯(lián)合321.8.1 結構定義321.8.2 結構類型變量的定義331.8.3 結構類型變量的初始化341.8.4 結構類型變量的引用341.8.5 聯(lián)合341.9 枚舉361.9.1 枚舉的定義361.9.2 枚舉元素的值371.9. 3 枚舉變量的使用371.10 類型定義381.10.1 類型定義的形式381.10.2 類型定義的使用381.11 位運算391.11.1 位運算符391.11.2 位域401.12 預處理功能411.12.1 簡單宏定義和帶參數(shù)宏定義411.12.2 文件包含431.12.3 條件編譯命令44第2章 C430--MSP430系列的C語言2.1 MSP430系列的C語言452.1.1 C430概述452.1.2 C430程序設計工作流程462.1.3 開始462.1.4 C430程序生成472.2 C430的數(shù)據(jù)表達482.2.1 數(shù)據(jù)類型482.2.2 編碼效率502.3 C430的配置512.3.1 引言512.3. 2 存儲器分配522.3.3 堆棧體積522.3.4 輸入輸出522.3.5 寄存器的訪問542.3.6 堆體積542.3.7 初始化54第3章 C430的開發(fā)調(diào)試環(huán)境3.1 引言563.1.1 Workbench特性563.1.2 Workbench的內(nèi)嵌編輯器特性563.1.3 C編譯器特性573.1. 4 匯編器特性573.1.5 連接器特性583.1.6 庫管理器特性583.1.7 C?SPY調(diào)試器特性593.2 Workbench概述593.2.1 項目管理模式593.2.2 選項設置603.2.3 建立項目603.2.4 測試代碼613.2.5 樣本應用程序613.3 Workbench的操作623.3.1 開始633.3.2 編譯項目683.3.3 連接項目693.3.4 調(diào)試項目713.3.5 使用Make命令733.4 Workbench的功能匯總753.4.1 Workbench的窗口753.4.2 Workbench的菜單功能813.5 Workbench的內(nèi)嵌編輯器993.5.1 內(nèi)嵌編輯器操作993.5.2 編輯鍵說明993.6 C?SPY概述1013.6.1 C?SPY的C語言級和匯編語言級調(diào)試1013.6.2 程序的執(zhí)行1023.7 C?SPY的操作1033.7.1 程序生成1033.7.2 編譯與連接1033.7.3 C?SPY運行1033.7.4 C語言級調(diào)試1043.7.5 匯編級調(diào)試1113.8 C?SPY的功能匯總1133.8.1 C?SPY的窗口1133.8.2 C?SPY的菜單命令功能1203.9 C?SPY的表達式與宏1323.9.1 匯編語言表達式1323.9.2 C語言表達式1333.9.3 C?SPY宏1353.9.4 C?SPY的設置宏1373.9.5 C?SPY的系統(tǒng)宏137 第4章 C430程序設計實例4.1 程序設計與調(diào)試環(huán)境1434.1.1 程序設計調(diào)試集成環(huán)境1434.1.2 設備連接1444.1.3 ProF149實驗系統(tǒng)1444.2 數(shù)值計算1454.2.1 C語言表達式1454.2.2 利用MPY實現(xiàn)運算1464.3 循環(huán)結構1474.4 選擇結構1484.5 SFR訪問1494.6 RAM訪問1504.7 FLASH訪問1514.8 WDT操作1534.8. 1 WDT使程序自動復位1534.8.2 程序對WATCHDOG計數(shù)溢出的控制1544.8.3 WDT的定時器功能1554.9 Timer操作1554.9.1 用Timer產(chǎn)生時鐘信號1554.9.2 用Timer檢測脈沖寬度1564.10 UART操作1574.10.1 點對點通信1574.10.2 點對多點通信1604.11 SPI操作1634.12 比較器操作1654.13 ADC12操作1674.13.1 單通道單次轉換1674.13.2 序列通道多次轉換1684.14 時鐘模塊操作1704.15 中斷服務程序1714.16 省電工作模式1754.17 調(diào)用匯編語言子程序1764.17.1 程序舉例1764.17.2 生成C程序調(diào)用的匯編子程序177第5章 C430的擴展特性5.1 C430的語言擴展概述1785.1.1 擴展關鍵字1785.1.2 #pragma編譯命令1785.1.3 預定義符號1795.1.4 本征函數(shù)1795.1.5 其他擴展特性1795.2 C430的關鍵字擴展1795.2.1 interrupt1805.2.2 monitor1805.2.3 no_init1815.2.4 sfrb1815.2.5 sfrw1825.3 C430的 #pragma編譯命令1825.3.1 bitfields=default1825.3.2 bitfields=reversed1825.3.3 codeseg1835.3.4 function=default1835.3.5 function=interrupt1845.3.6 function=monitor1845.3.7 language=default1845.3.8 language=extended1845.3.9 memory=constseg1855.3.10 memory=dataseg1855.3.11 memory=default1855.3.12 memory=no_init1865.3.13 warnings=default1865.3.14 warnings=off1865.3.15 warnings=on1865.4 C430的預定義符號1865.4.1 DATE1875.4.2 FILE1875.4.3 IAR_SYSTEMS_ICC1875.4.4 LINE1875.4.5 STDC1875.4.6 TID1875.4.7 TIME1885.4.8 VER1885.5 C430的本征函數(shù)1885.5.1 _args＄1885.5.2 _argt＄1895.5.3 _BIC_SR1895.5.4 _BIS_SR1905.5.5 _DINT1905.5.6 _EINT1905.5.7 _NOP1905.5.8 _OPC1905.6 C430的匯編語言接口1915.6.1 創(chuàng)建匯編子程序框架1915.6.2 調(diào)用規(guī)則1915.6.3 C程序調(diào)用匯編子程序1935.7 C430的段定義1935.7.1 存儲器分布與段定義1945.7.2 CCSTR段1945.7.3 CDATA0段1945.7.4 CODE段1955.7.5 CONST1955.7.6 CSTACK1955.7.7 CSTR1955.7.8 ECSTR1955.7.9 IDATA01965.7.10 INTVEC1965.7.11 NO_INIT1965.7.12 UDATA0196第6章 C430的庫函數(shù)6.1 引言1976.1.1 庫模塊文件1976.1.2 頭文件1976.1.3 庫定義匯總1976.2C 庫函數(shù)參考2046.2.1 C庫函數(shù)的說明格式2046.2.2 C庫函數(shù)說明204第7章 C430編譯器的診斷消息7.1 編譯診斷消息的類型2307.2 編譯出錯消息2317.3 編譯警告消息243附錄 AMSP430系列FLASH型芯片資料248附錄 BProF149實驗系統(tǒng)251附錄 CMSP430x14x.H文件253附錄 DIAR MSP430 C語言產(chǎn)品介紹275
上傳時間： 2014-05-05
上傳用戶：253189838
I2C interface, is a very powerful tool for system designers. Theintegrated protocols allow systems to be completely software defined.Software development time of different products can be reduced byassembling a library of reusable software modules. In addition, themultimaster capability allows rapid testing and alignment ofend-products via external connections to an assembly-line computer.The mask programmable 87LPC76X and its EPROM version, the87LPC76X, can operate as a master or a slave device on the I2Csmall area network. In addition to the efficient interface to thededicated function ICs in the I2C family, the on-board interfacefacilities I/O and RAM expansion, access to EEPROM andprocessor-to-processor communications.
標簽： microcontro Using 76X LPC
上傳時間： 2013-12-30
上傳用戶：Artemis
隨著HDL Hardware Description Language 硬件描述語言語言綜合工具及其它相關工具的推廣使廣大設計工程師從以往煩瑣的畫原理圖連線等工作解脫開來能夠將工作重心轉移到功能實現(xiàn)上極大地提高了工作效率任何事務都是一分為二的有利就有弊我們發(fā)現(xiàn)現(xiàn)在越來越多的工程師不關心自己的電路實現(xiàn)形式以為我只要將功能描述正確其它事情交給工具就行了在這種思想影響下工程師在用HDL語言描述電路時腦袋里沒有任何電路概念或者非常模糊也不清楚自己寫的代碼綜合出來之后是什么樣子映射到芯片中又會是什么樣子有沒有充分利用到FPGA的一些特殊資源遇到問題立刻想到的是換速度更快容量更大的FPGA器件導致物料成本上升更為要命的是由于不了解器件結構更不了解與器件結構緊密相關的設計技巧過分依賴綜合等工具工具不行自己也就束手無策導致問題遲遲不能解決從而嚴重影響開發(fā)周期導致開發(fā)成本急劇上升 目前我們的設計規(guī)模越來越龐大動輒上百萬門幾百萬門的電路屢見不鮮同時我們所采用的器件工藝越來越先進已經(jīng)步入深亞微米時代而在對待深亞微米的器件上我們的設計方法將不可避免地發(fā)生變化要更多地關注以前很少關注的線延時我相信ASIC設計以后也會如此此時如果我們不在設計方法設計技巧上有所提高是無法面對這些龐大的基于深亞微米技術的電路設計而且現(xiàn)在的競爭越來越激勵從節(jié)約公司成本角度出 也要求我們盡可能在比較小的器件里完成比較多的功能 本文從澄清一些錯誤認識開始從FPGA器件結構出發(fā)以速度路徑延時大小和面積資源占用率為主題描述在FPGA設計過程中應當注意的問題和可以采用的設計技巧本文對讀者的技能基本要求是熟悉數(shù)字電路基本知識如加法器計數(shù)器RAM等熟悉基本的同步電路設計方法熟悉HDL語言對FPGA的結構有所了解對FPGA設計流程比較了解
上傳時間： 2013-11-06
上傳用戶：asdfasdfd
The NCV7356 is a physical layer device for a single wire data linkcapable of operating with various Carrier Sense Multiple Accesswith Collision Resolution (CSMA/CR) protocols such as the BoschController Area Network (CAN) version 2.0. This serial data linknetwork is intended for use in applications where high data rate is notrequired and a lower data rate can achieve cost reductions in both thephysical media components and in the microprocessor and/ordedicated logic devices which use the network.The network shall be able to operate in either the normal data ratemode or a high-speed data download mode for assembly line andservice data transfer operations. The high-speed mode is onlyintended to be operational when the bus is attached to an off-boardservice node. This node shall provide temporary bus electrical loadswhich facilitate higher speed operation. Such temporary loads shouldbe removed when not performing download operations.The bit rate for normal communications is typically 33 kbit/s, forhigh-speed transmissions like described above a typical bit rate of83 kbit/s is recommended. The NCV7356 features undervoltagelockout, timeout for faulty blocked input signals, output blankingtime in case of bus ringing and a very low sleep mode current.
上傳時間： 2013-10-24
上傳用戶：s藍莓汁
c語言的好教程，值得一學
標簽： programing language the
上傳時間： 2013-11-11
上傳用戶：fqscfqj
