This a demo illustrating (1) 8-BIT CRC check sums, (2) 57600,N,9,1 communications, and (3) RS-422/RS-485 communications.
標(biāo)簽： communications illustrating 57600 check
上傳時(shí)間： 2014-01-06
上傳用戶：yiwen213
These routines transmit and receive serial data using two general * I/O pins, in 8 BIT, No parity, 1 stop BIT format. They are useful * for performing serial I/O on 8051 derivatives not having an * internal UART, or for implementing a second serial channel.
標(biāo)簽： routines transmit receive general
上傳時(shí)間： 2015-05-22
上傳用戶：firstbyte
此軟件包包含了模擬I2C C51程序軟件包和ZLG7290的C51程序然后包。 軟件包的接口界面： （1） BIT ISendByte(uchar sla,uchar c) （無(wú)子地址）寫(xiě)單字節(jié)數(shù)據(jù) （現(xiàn)行地址寫(xiě)） （2） BIT IRcvByte(uchar sla,uchar *c) （無(wú)子地址）讀單字節(jié)數(shù)據(jù) （現(xiàn)行地址讀） （3） BIT ISendStr(uchar sla,uchar suba,uchar *s,uchar no)（有子地址）讀N字節(jié)數(shù)據(jù) （4） BIT IRcvStr(uchar sla,uchar suba,uchar *s,uchar no) （有子地址）寫(xiě)N字節(jié)數(shù)據(jù) （5） BIT ISendStr(uchar sla,uchar *s,uchar no) （無(wú)子地址）寫(xiě)多字節(jié)數(shù)據(jù) （6） BIT IRcvStr(uchar sla,uchar *s,uchar no) （無(wú)子地址）讀單字節(jié)數(shù)據(jù) （7） unsigned char ZLG7290_SendData(unsigned char SubAdd,unsigned char Data) （8） void ZLG7290_SendBuf(unsigned char * disp_buf,unsigned char num) （9） unsigned char ZLG7290_SendCmd(unsigned char Data1,unsigned char Data2) （10）unsigned char ZLG7290_GetKey()
標(biāo)簽： uchar C51 ISendByte 7290
上傳時(shí)間： 2013-12-05
上傳用戶：hongmo
Samsung s S3C4510B 16/32-BIT RISC microcontroller is a cost-effective, high-performance microcontroller solution for Ethernet-based systems. An integrated Ethernet controller, the S3C4510B, is designed for use in managed communication hubs and routers.
標(biāo)簽： high-performance microcontroller cost-effective microcontrol
上傳時(shí)間： 2014-03-03
上傳用戶：haohaoxuexi
個(gè)人認(rèn)為幾個(gè)比較實(shí)用的VHDL源碼之二——Behavioural model of a simple 8-BIT CPU
標(biāo)簽： Behavioural simple model VHDL
上傳時(shí)間： 2013-12-16
上傳用戶：gdgzhym
-- Booth Multiplier -- This file contains all the entity-architectures for a complete -- k-BIT x k-BIT Booth multiplier. -- the design makes use of the new shift operators available in the VHDL-93 std -- this design passes the Synplify synthesis check -- download from: www.fpga.com.cn & www.pld.com.cn
標(biāo)簽： entity-architectures Multiplier contains complete
上傳時(shí)間： 2015-07-02
上傳用戶：2467478207
IDCT-M is a medium speed 1D IDCT core -- it can accept a continous stream of 12-BIT input words at a rate of -- 1 BIT/ck cycle, operating at 50MHz speed, it can process MP@ML MPEG video -- the core is 100％ synthesizable
標(biāo)簽： continous IDCT-M accept medium
上傳時(shí)間： 2015-07-07
上傳用戶：1583060504
11 BIT dsp core data sheet
上傳時(shí)間： 2013-12-13
上傳用戶：Avoid98
TigerSharc TS201 32-BIT floating point FFT routine
標(biāo)簽： TigerSharc floating routine point
上傳時(shí)間： 2015-07-23
上傳用戶：小眼睛LSL
TigerSharc TS201 32-BIT floating point IIR filter routine.
標(biāo)簽： TigerSharc floating routine filter
上傳時(shí)間： 2014-01-21
上傳用戶：tyler
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