A collection of math routines including 8-bit, 16-bit, 32-bit signed and unsigned addition, subtraction, multiplication, and division. Very nice code library with heavy in-line documentation! Been looking for multi-byte divide? Here it is.
標簽： bit collection including addition
上傳時間： 2015-05-17
上傳用戶：cursor
This a demo illustrating (1) 8-bit CRC check sums, (2) 57600,N,9,1 communications, and (3) RS-422/RS-485 communications.
標簽： communications illustrating 57600 check
上傳時間： 2014-01-06
上傳用戶：yiwen213
These routines transmit and receive serial data using two general * I/O pins, in 8 bit, No parity, 1 stop bit format. They are useful * for performing serial I/O on 8051 derivatives not having an * internal UART, or for implementing a second serial channel.
標簽： routines transmit receive general
上傳時間： 2015-05-22
上傳用戶：firstbyte
此軟件包包含了模擬I2C C51程序軟件包和ZLG7290的C51程序然后包。 軟件包的接口界面： （1） bit ISendByte(uchar sla,uchar c) （無子地址）寫單字節數據 （現行地址寫） （2） bit IRcvByte(uchar sla,uchar *c) （無子地址）讀單字節數據 （現行地址讀） （3） bit ISendStr(uchar sla,uchar suba,uchar *s,uchar no)（有子地址）讀N字節數據 （4） bit IRcvStr(uchar sla,uchar suba,uchar *s,uchar no) （有子地址）寫N字節數據 （5） bit ISendStr(uchar sla,uchar *s,uchar no) （無子地址）寫多字節數據 （6） bit IRcvStr(uchar sla,uchar *s,uchar no) （無子地址）讀單字節數據 （7） unsigned char ZLG7290_SendData(unsigned char SubAdd,unsigned char Data) （8） void ZLG7290_SendBuf(unsigned char * disp_buf,unsigned char num) （9） unsigned char ZLG7290_SendCmd(unsigned char Data1,unsigned char Data2) （10）unsigned char ZLG7290_GetKey()
上傳時間： 2013-12-05
上傳用戶：hongmo
Title:Ultra-Wide Band Radio UWB Colloquium IEE-Savoy Place London
標簽： Colloquium Ultra-Wide IEE-Savoy London
上傳時間： 2013-12-20
上傳用戶：從此走出陰霾
Samsung s S3C4510B 16/32-bit RISC microcontroller is a cost-effective, high-performance microcontroller solution for Ethernet-based systems. An integrated Ethernet controller, the S3C4510B, is designed for use in managed communication hubs and routers.
標簽： high-performance microcontroller cost-effective microcontrol
上傳時間： 2014-03-03
上傳用戶：haohaoxuexi
個人認為幾個比較實用的VHDL源碼之二——Behavioural model of a simple 8-bit CPU
標簽： Behavioural simple model VHDL
上傳時間： 2013-12-16
上傳用戶：gdgzhym
-- Booth Multiplier -- This file contains all the entity-architectures for a complete -- k-bit x k-bit Booth multiplier. -- the design makes use of the new shift operators available in the VHDL-93 std -- this design passes the Synplify synthesis check -- download from: www.fpga.com.cn & www.pld.com.cn
標簽： entity-architectures Multiplier contains complete
上傳時間： 2015-07-02
上傳用戶：2467478207
IDCT-M is a medium speed 1D IDCT core -- it can accept a continous stream of 12-bit input words at a rate of -- 1 bit/ck cycle, operating at 50MHz speed, it can process MP@ML MPEG video -- the core is 100％ synthesizable
標簽： continous IDCT-M accept medium
上傳時間： 2015-07-07
上傳用戶：1583060504
11 bit dsp core data sheet
上傳時間： 2013-12-13
上傳用戶：Avoid98
