Bandgap reference Voltage
標(biāo)簽: reference Bandgap Voltage
上傳時(shí)間: 2013-12-25
上傳用戶:1583060504
模擬集成電路的設(shè)計(jì)與其說是一門技術(shù),還不如說是一門藝術(shù)。它比數(shù)字集成電路設(shè)計(jì)需要更嚴(yán)格的分析和更豐富的直覺。嚴(yán)謹(jǐn)堅(jiān)實(shí)的理論無疑是嚴(yán)格分析能力的基石,而設(shè)計(jì)者的實(shí)踐經(jīng)驗(yàn)無疑是誕生豐富直覺的源泉。這也正足初學(xué)者對(duì)學(xué)習(xí)模擬集成電路設(shè)計(jì)感到困惑并難以駕馭的根本原因。.美國加州大學(xué)洛杉機(jī)分校(UCLA)Razavi教授憑借著他在美國多所著名大學(xué)執(zhí)教多年的豐富教學(xué)經(jīng)驗(yàn)和在世界知名頂級(jí)公司(AT&T,Bell Lab,HP)卓著的研究經(jīng)歷為我們提供了這本優(yōu)秀的教材。本書自2000午出版以來得到了國內(nèi)外讀者的好評(píng)和青睞,被許多國際知名大學(xué)選為教科書。同時(shí),由于原著者在世界知名頂級(jí)公司的豐富研究經(jīng)歷,使本書也非常適合作為CMOS模擬集成電路設(shè)計(jì)或相關(guān)領(lǐng)域的研究人員和工程技術(shù)人員的參考書。... 本書介紹模擬CMOS集成電路的分析與設(shè)計(jì)。從直觀和嚴(yán)密的角度闡述了各種模擬電路的基本原理和概念,同時(shí)還闡述了在SOC中模擬電路設(shè)計(jì)遇到的新問題及電路技術(shù)的新發(fā)展。本書由淺入深,理論與實(shí)際結(jié)合,提供了大量現(xiàn)代工業(yè)中的設(shè)計(jì)實(shí)例。全書共18章。前10章介紹各種基本模塊和運(yùn)放及其頻率響應(yīng)和噪聲。第11章至第13章介紹帶隙基準(zhǔn)、開關(guān)電容電路以及電路的非線性和失配的影響,第14、15章介紹振蕩器和鎖相環(huán)。第16章至18章介紹MOS器件的高階效應(yīng)及其模型、CMOS制造工藝和混合信號(hào)電路的版圖與封裝。 1 Introduction to Analog Design 2 Basic MOS Device Physics 3 Single-Stage Amplifiers 4 Differential Amplifiers 5 Passive and Active Current Mirrors 6 Frequency Response of Amplifiers 7 Noise 8 Feedback 9 Operational Amplifiers 10 Stability and Frequency Compensation 11 Bandgap References 12 Introduction to Switched-Capacitor Circuits 13 Nonlinearity and Mismatch 14 Oscillators 15 Phase-Locked Loops 16 Short-Channel Effects and Device Models 17 CMOS Processing Technology 18 Layout and Packaging
標(biāo)簽: analog design cmos of
上傳時(shí)間: 2014-12-23
上傳用戶:杜瑩12345
The AZ1117 is a series of low dropout three-terminal regulators with a dropout of 1.15V at 1A output current. The AZ1117 series provides current limiting and thermal shutdown. Its circuit includes a trimmed Bandgap reference to assure output voltage accuracy to be within 1% for 1.5V, 1.8V, 2.5V, 2.85V, 3.3V, 5.0V and adjustable versions or 2% for 1.2V version. Current limit is trimmed to ensure specified output current and controlled short-circuit current. On-chip thermal shutdown provides protection against any combination of overload and ambient temperature that would create excessive junction temperature. The AZ1117 has an adjustable version, that can provide the output voltage from 1.25V to 12V with only 2 external resistors.
上傳時(shí)間: 2019-04-11
上傳用戶:heaven0o0o0
stract With global drivers such as better energy consumption, energy efficiency and reduction of greenhouse gases, CO 2 emission reduction has become key in every layer of the value chain. Power Electronics has definitely a role to play in these thrilling challenges. From converters down to compound semiconductors, innovation is leading to breakthrough technologies. Wide Bandgap, Power Module Packaging, growth of Electric Vehicle market will game change the overall power electronic industry and supply chain. In this presentation we will review power electronics trends, from technologies to markets.
標(biāo)簽: Electronics Materials Power WBG for
上傳時(shí)間: 2020-06-07
上傳用戶:shancjb
低壓差線性穩(wěn)壓器(Low Dropout Voltage Regulator,LDO)屬于線性穩(wěn)壓器的一種,但由于其壓差較低,相對(duì)于一般線性穩(wěn)壓器而言具有較高的轉(zhuǎn)換效率。但在電路穩(wěn)定性上有所下降,而且LDO有著較高的輸出電阻,使得輸出極點(diǎn)的位置會(huì)隨著負(fù)載情況有很大關(guān)系。因此需要對(duì)LDO進(jìn)行頻率補(bǔ)償來滿足其環(huán)路穩(wěn)定性要求。內(nèi)容安排上第一節(jié)首先簡(jiǎn)單介紹各種線性穩(wěn)壓源的區(qū)別:第二節(jié)介紹LDO中的主要參數(shù)及設(shè)計(jì)中需要考慮折中的一些問題;第三節(jié)對(duì)LDO開環(huán)電路的三個(gè)模塊,運(yùn)放模塊,PMOS模塊和反饋模塊進(jìn)行簡(jiǎn)化的小信號(hào)分析,得出其傳輸函數(shù)并判斷其零極點(diǎn):第四節(jié)針對(duì)前面分析的三個(gè)LDO環(huán)路模塊分別進(jìn)行補(bǔ)償考慮,并結(jié)合RT9193電路對(duì)三種補(bǔ)償方法進(jìn)行了仿真驗(yàn)證和解釋說明。該電路主要包含基準(zhǔn)電路以及相關(guān)啟動(dòng)電路,保護(hù)電路(OTP,OCP等),誤差放大器,調(diào)整管(Pass Element)和電阻反饋網(wǎng)絡(luò)。在電路上,通過連接到誤差放大器反相輸入端的分壓電阻對(duì)輸出電壓進(jìn)行采樣,誤差放大器的同相輸入端連接到一個(gè)基準(zhǔn)電壓(Bandgap Reference),誤差放大器會(huì)使得兩個(gè)輸入端電壓基本相等,因此,可以通過控制調(diào)整管輸出足夠的負(fù)載電流以保證輸出電壓穩(wěn)定。電路所采用的調(diào)整管不同,其Dropout電壓不同。以前大多使用三極管來作為穩(wěn)壓源的調(diào)整管,常見的有NPN穩(wěn)壓源,PNP穩(wěn)壓源(LDO),準(zhǔn)LDO穩(wěn)壓源,其調(diào)整管如圖2所示,其Dorpout電壓分別是:VoRop=2VBE+ Vsr-NPN穩(wěn)壓源VoRоP =VsurPNP穩(wěn)壓源(LDO)VDRoP=VE + Vsur-準(zhǔn)LDO穩(wěn)壓源
標(biāo)簽: ldo 環(huán)路分析
上傳時(shí)間: 2022-06-19
上傳用戶:
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