bayeserr - Computes the Bayesian risk for optimal classifier.
％ bayescln - Classifier based on Bayes decision rule for Gaussians.
％ bayesnd - Discrim. function, dichotomy, max aposteriori probability.
％ bhattach - Bhattacharya s upper limit of mean class. error.
％ pbayescln - Plots discriminat function of Bayes classifier.
-- Booth Multiplier
-- This file contains all the entity-architectures for a complete
-- k-bit x k-bit Booth multiplier.
-- the design makes use of the new shift operators available in the VHDL-93 std
-- this design passes the Synplify synthesis check
-- download from: www.fpga.com.cn & www.pld.com.cn
This a set of notes I put together for my Computer Architecture
class in 1990. Students had a project in which they had to model a
microprocessor architecture of their choice. They used these notes to
learn VHDL. The notes cover the VHDL-87 version of the language.
Not all of the language is covered (about 95％).
You may use this booklet for your own personal learning purposes.
You may not use it for profit (eg, selling copies of it, using it in a
course for which people pay, etc). If you want to make use of it
beyond these conditions, contact me and we can come to some
arrangement.
modelsim_se_tutorThis is a set of notes I put together for my Computer Architecture
class in 1990. Students had a project in which they had to model a
microprocessor architecture of their choice. They used these notes to
learn VHDL. The notes cover the VHDL-87 version of the language.
Not all of the language is covered (about 95％).
This is a set of notes I put together for my Computer Architecture
class in 1990. Students had a project in which they had to model a
microprocessor architecture of their choice. They used these notes to
learn VHDL. The notes cover the VHDL-87 version of the language.
Not all of the language is covered (about 95％).
This tutorial attempts to get you started developing with the Win32 API as quickly and clearly as possible. It is meant to be read as a whole, so please read it from beginning to end before asking questions... most of them will probably be answered. Each section builds on the sections before it. I have also added some solutions to common errors in Appendix A. If you ask me a question that is answered on this page, you will look very silly.
This companion disc contains the source code for the sample
programs presented in INSIDE VISUAL C++ 5.0, as well as pre-
compiled copies of the programs.
-- Booth Multiplier
-- This file contains all the entity-architectures for a complete
-- k-bit x k-bit Booth multiplier.
-- the design makes use of the new shift operators available in the VHDL-93 std
-- this design passes the Synplify synthesis check
The source code for this package is located in src/gov/nist/sip/proxy. The proxy
is a pure JAIN-SIP application: it does not need proprietary nist-sip
classes in addition of those defined in JAIN-SIP 1.1, you can substitute
the NIST-SIP stack by another JAIN-SIP-1.1 compliant stack and it should
interoperate.
he proxy can act as presence server and be able to process NOTIFY and
SUBSCRIBE requests. If this parameter is disabled, the proxy will simply
forward those kind of requests following the appropriate routing decision.
Welcome to the software files for the ADS8361 to TMS320F2812!
There are two project files in each of the folders McBSP, SPI and Both. Mode II and IV are explored using the McBSP port alone, as well as the SPI port. These projects are located in the SPI and McBSP folders.
Modes I and III are explored using both McBSP and SPI. In Mode I, the M0 and M1 pins are controlled by use of the jumper on the evaluation module. A0 is controlled by the DX pin of the McBSP port. In Mode III, the A0, M0 and M1 pins are controlled via GPIO functions of PortF.
The "SRC", "CMD" and "INCLUDE" files in the archive are from "C28x Peripheral Examples in C" (document # SPRC097). If you have questions about this or other Data Converter products, feel free to e-mail us at:
