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CODING-<b>CODING</b>

State Machine Coding Styles for Synthesis

本文論述了狀態機的verilog編碼風格,以及不同編碼風格的優缺點，Steve Golson's 1994 paper, "State Machine Design Techniques for Verilog and VHDL" [1], is agreat paper on state machine design using Verilog, VHDL and Synopsys tools. Steve's paper alsooffers in-depth background concerning the origin of specific state machine types.This paper, "State Machine Coding Styles for Synthesis," details additional insights into statemachine design including coding style approaches and a few additional tricks.

標簽： Synthesis Machine Coding Styles

上傳時間： 2013-10-15

上傳用戶：dancnc
2012TI杯陜西賽題B題--頻率補償電路

2012TI杯陜西賽題H題,2012TI杯陜西賽題B題--頻率補償電路.

標簽： 2012 TI 頻率補償電路

上傳時間： 2013-10-07

上傳用戶：ysystc670
PSHLY-B回路電阻測試儀

PSHLY-B回路電阻測試儀介紹

標簽： PSHLY-B 回路電阻測試儀

上傳時間： 2013-11-05

上傳用戶：木子葉1
基于單片機的數字化B超鍵盤設計

針對目前使用的RS232接口數字化B超鍵盤存在PC主機啟動時不能設置BIOS，提出一種PS2鍵盤的設計方法。基于W78E052D單片機，采用8通道串行A/D轉換器設計了8個TGC電位器信息采集電路，電位器位置信息以鍵盤掃描碼序列形式發送，正交編碼器信號通過XC9536XL轉換為單片機可接收的中斷信號，軟件接收到中斷信息后等效處理成按鍵。結果表明，在滿足開機可設置BIOS同時，又可實現超聲特有功能，不需要專門設計驅動程序，接口簡單，成本低。 Abstract: Aiming at the problem of the digital ultrasonic diagnostic imaging system keyboard with RS232 interface currently used couldn?蒺t set the BIOS when the PC boot， this paper proposed a design method of PS2 keyboards. Based on W78E052D microcontroller，designed eight TGC potentiometers information acquisition circuit with 8-channel serial A/D converter， potentiometer position information sent out with keyboard scan code sequentially.The control circuit based on XC9536 CPLD is used for converting the mechanical actions of the encoders into the signals that can be identified by the MCU， software received interrupt information and equivalently treatmented as key. The results show that the BIOS can be set to meet the boot， ultrasound specific functionality can be achieved at the same time， it does not require specially designed driver，the interface is simple and low cost.

標簽： 單片機 B超數字化鍵盤設計

上傳時間： 2013-10-10

上傳用戶：asdfasdfd
TKS仿真器B系列快速入門

TKS仿真器B系列快速入門

標簽： TKS 仿真器快速入門

上傳時間： 2013-10-31

上傳用戶：aix008
Embedded C Coding Standard

Embedded C Coding Standard 嵌入式標準C

標簽： Embedded Standard Coding

上傳時間： 2013-11-02

上傳用戶：xiaoyuer
Verilog Coding Style for Efficient Digital Design

In this paper, we discuss efficient coding and design styles using verilog. This can beimmensely helpful for any digital designer initiating designs. Here, we address different problems rangingfrom RTL-Gate Level simulation mismatch to race conditions in writing behavioral models. All theseproblems are accompanied by an example to have a better idea, and these can be taken care off if thesecoding guidelines are followed. Discussion of all the techniques is beyond the scope of this paper, however,here we try to cover a few of them.

標簽： Efficient Verilog Digital Coding

上傳時間： 2013-11-23

上傳用戶：我干你啊
State Machine Coding Styles for Synthesis

本文論述了狀態機的verilog編碼風格,以及不同編碼風格的優缺點，Steve Golson's 1994 paper, "State Machine Design Techniques for Verilog and VHDL" [1], is agreat paper on state machine design using Verilog, VHDL and Synopsys tools. Steve's paper alsooffers in-depth background concerning the origin of specific state machine types.This paper, "State Machine Coding Styles for Synthesis," details additional insights into statemachine design including coding style approaches and a few additional tricks.

標簽： Synthesis Machine Coding Styles

上傳時間： 2013-10-12

上傳用戶：sardinescn
一個簡單好用的B+樹算法實現

一個簡單好用的B+樹算法實現

標簽： 樹算法

上傳時間： 2015-01-04

上傳用戶：縹緲
一個用Basic實現的B-Tree算法

一個用Basic實現的B-Tree算法

標簽： B-Tree Basic 算法

上傳時間： 2013-12-30

上傳用戶：ccclll