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CPU-Microcontroller

一種實(shí)用的單片機(jī)雙CPU設(shè)計(jì)方案及其應(yīng)用

一種實(shí)用的單片機(jī)雙CPU設(shè)計(jì)方案及其應(yīng)用:針對傳統(tǒng)儀表具有的硬件資源不足、速度慢等功能缺陷,提出了一種基于單片機(jī)的CPU設(shè)計(jì)方案,即擴(kuò)展CPU,直接從主CPU對應(yīng)的數(shù)據(jù)顯示I/O口上獲取數(shù)據(jù),這種獲取數(shù)據(jù)的雙CPU設(shè)計(jì)方案中主從CPU之間在功能上相互獨(dú)立,主CPU不受擴(kuò)展CPU加入的影響,實(shí)現(xiàn)其固有功能,保證了測量數(shù)據(jù)的準(zhǔn)確性;擴(kuò)展CPU從主CPU中獲取數(shù)據(jù),不受主CPU的控制,按照現(xiàn)場的需求進(jìn)行功能擴(kuò)展。給出了詳細(xì)的軟硬件設(shè)計(jì)結(jié)構(gòu)。該方案為傳統(tǒng)儀表的升級(jí)改造提供了一種新思路,實(shí)踐證明是可行的。關(guān)鍵詞: 傳統(tǒng)儀表　檢測系統(tǒng)　單片機(jī)

標(biāo)簽： CPU 單片機(jī) 設(shè)計(jì)方案

上傳時(shí)間： 2013-10-30

上傳用戶：evil
The 8051 Microcontroller

The 8051 Microcontroller:

標(biāo)簽： Microcontroller 8051 The

上傳時(shí)間： 2013-11-12

上傳用戶：shanml
Emulating a synchronous serial

The C500 microcontroller family usually provides only one on-chip synchronous serialchannel (SSC). If a second SSC is required, an emulation of the missing interface mayhelp to avoid an external hardware solution with additional electronic components.The solution presented in this paper and in the attached source files emulates the mostimportant SSC functions by using optimized SW routines with a performance up to 25KBaud in Slave Mode with half duplex transmission and an overhead less than 60% atSAB C513 with 12 MHz. Due to the implementation in C this performance is not the limitof the chip. A pure implementation in assembler will result in a strong reduction of theCPU load and therefore increase the maximum speed of the interface. In addition,microcontrollers like the SAB C505 will speed up the interface by a factor of two becauseof an optimized architecture compared with the SAB C513.Moreover, this solution lays stress on using as few on-chip hardware resources aspossible. A more excessive consumption of those resources will result in a highermaximum speed of the emulated interface.Due to the restricted performance of an 8 bit microcontroller a pin compatible solution isprovided only; the internal register based programming interface is replaced by a set ofsubroutine calls.The attached source files also contain a test shell, which demonstrates how to exchangeinformation between an on-chip HW-SSC and the emulated SW-SSC via 5 external wiresin different operation modes. It is based on the SAB C513 (Siemens 8 bit microcontroller).A table with load measurements is presented to give an indication for the fraction of CPUperformance required by software for emulating the SSC.

標(biāo)簽： synchronous Emulating serial

上傳時(shí)間： 2014-01-31

上傳用戶：z1191176801
An easy way to work with Exter

Internal Interrupts are used to respond to asynchronous requests from a certain part of themicrocontroller that needs to be serviced. Each peripheral in the TriCore as well as theBus Control Unit, the Debug Unit, the Peripheral Control Processor (PCP) and the CPUitself can generate an Interrupt Request.So what is an external Interrupt?An external Interrupt is something alike as the internal Interrupt. The difference is that anexternal Interrupt request is caused by an external event. Normally this would be a pulseon Port0 or Port1, but it can be even a signal from the input buffer of the SSC, indicatingthat a service is requested.The User’s Manual does not explain this aspect in detail so this ApNote will explain themost common form of an external Interrupt request. This ApNote will show that there is aneasy way to react on a pulse on Port0 or Port1 and to create with this impulse an InterruptService Request. Later in the second part of the document, you can find hints on how todebounce impulses to enable the use of a simple switch as the input device.Note: You will find additional information on how to setup the Interrupt System in theApNote “First steps through the TriCore Interrupt System” (AP3222xx)1. It would gobeyond the scope of this document to explain this here, but you will find selfexplanatoryexamples later on.

標(biāo)簽： Exter easy work with

上傳時(shí)間： 2013-10-27

上傳用戶：zhangyigenius
基于FPGA的CPU設(shè)計(jì)

FPGA的CPU設(shè)計(jì)

標(biāo)簽： FPGA CPU

上傳時(shí)間： 2013-11-20

上傳用戶：yqs138168
基于國密算法CPU卡的門禁系統(tǒng)方案的設(shè)計(jì)

為了提高門禁系統(tǒng)的安全便利性，提出了一種基于國密算法的CPU卡的門禁系統(tǒng)的解決方案。首先對門禁系統(tǒng)的組成進(jìn)行了介紹，接著論述了非接觸CPU卡的相對于非接觸邏輯加密卡的特點(diǎn)及優(yōu)勢；基于國密算法SM1的特點(diǎn)以及配合落實(shí)住建部重要門禁系統(tǒng)密碼應(yīng)用安全管理工作要求，提出了一種基于國密SM1算法CPU卡的門禁系統(tǒng)解決方案。基于國密算法CPU卡的門禁系統(tǒng)解決方案能夠滿足最新門禁系統(tǒng)市場需求，具有安全、靈活多樣等多種的特點(diǎn)。

標(biāo)簽： CPU 國密算法門禁系統(tǒng) 方案

上傳時(shí)間： 2013-11-01

上傳用戶：xiaoyunyun
CPU卡安全認(rèn)證技術(shù)

CPU卡安全認(rèn)證技術(shù)

標(biāo)簽： CPU 安全認(rèn)證

上傳時(shí)間： 2013-11-02

上傳用戶：lizx30340
信捷PLC CPU處理器

信捷PLC CPU 處理器

標(biāo)簽： PLC CPU 信捷處理器

上傳時(shí)間： 2014-01-23

上傳用戶：wbwyl
手機(jī)CPU排行

手機(jī)CPU排行

標(biāo)簽： CPU 手機(jī)

上傳時(shí)間： 2013-10-19

上傳用戶：tzrdcaabb
PLUS CPU卡片升級(jí)方案

對于如何從MIFARE Classic卡片升級(jí)到PLUS CPU 卡片在“MIFARE S50、S70升級(jí)PLUS CPU卡方案”文檔中已有詳細(xì)說明，那么原來使用的PLUS CPU卡片如何進(jìn)行升級(jí)了？帶著這個(gè)問題，我們將與您共同探討，后面的內(nèi)容將向您提供一種完美、可靠、易用的解決方案，謝謝您的關(guān)注與支持！

標(biāo)簽： PLUS CPU 卡片方案

上傳時(shí)間： 2014-12-31

上傳用戶：VRMMO