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CoMPonent-based

  • 基于S3C2440A的銀行評(píng)價(jià)器的設(shè)計(jì)

    提出了一種以S3C2440A為核心處理器的銀行評(píng)價(jià)器的設(shè)計(jì)方案,并結(jié)合XILINX公司的XL95144XL型CPLD,輔助S3C2440A,實(shí)現(xiàn)該銀行評(píng)價(jià)器的各部分功能以及系統(tǒng)信號(hào)之間的相互協(xié)調(diào)。該評(píng)價(jià)器在系統(tǒng)設(shè)計(jì)上采用液晶屏顯示,代替了以往簡(jiǎn)單的數(shù)碼管電路的顯示模式,在視覺上給人以全新的享受。同時(shí),評(píng)價(jià)器增加了新的網(wǎng)絡(luò)供電方式,只要將評(píng)價(jià)器連接上網(wǎng)絡(luò)就可以正常工作,方便了客戶的使用。總之,此款銀行評(píng)價(jià)器采用了嵌入式系統(tǒng)的設(shè)計(jì)方案,大大豐富了系統(tǒng)功能,實(shí)現(xiàn)一個(gè)銀行評(píng)價(jià)器設(shè)計(jì)的新突破。 Abstract:  S3C2440A of SamSung company is the core component of the embedded system. A design of bank assessor based on S3C2440A was provided in this paper. It used XL95144XL combined with S3C2440A to realize all the functions and coordination with system signals. This bank assessor used LCD to display instead of the former simple digital display and provided a new seusuous enjoment. Meanwhile,it provided a new method of network power supply,that the bank assessor could regularly work once it connected to the network,which is convenient for customers to use. In a word,this assessor takes embedded system,enriches the system’s functions and reclizes a new breakout.

    標(biāo)簽: S3C2440A

    上傳時(shí)間: 2013-11-03

    上傳用戶:taa123456

  • 基于AT89C52單片機(jī)的溫度巡回檢測(cè)系統(tǒng)設(shè)計(jì)

    闡述了一個(gè)由上位PC機(jī)和AT89C52下位單片機(jī)組成的主從分布式溫度巡回檢測(cè)系統(tǒng)。主從機(jī)采用RS-485 串行通訊標(biāo)準(zhǔn)進(jìn)行通信,可在下位單片機(jī)實(shí)現(xiàn)基本的溫度數(shù)據(jù)巡回檢測(cè)基礎(chǔ)上,由上位PC機(jī)實(shí)現(xiàn)綜合處理功能或擴(kuò)展為遠(yuǎn)程操作。整個(gè)系統(tǒng)具有巡檢速度快,擴(kuò)展性好的特點(diǎn)。 Abstract:  In this paper,a top PC and AT89C52 under-bit microcontrollers from the main component of the tour distributed temperature detection system is presented. Master and slave can use RS-485 serial communication standards for communications.Based on next-bit machine for basic goods temperature detected data Tour, the top can achieve the integrated treatment of PC functions or for the expansion of long-distance operation. The entire inspection system is fast, expansion.

    標(biāo)簽: 89C C52 AT 89

    上傳時(shí)間: 2013-10-13

    上傳用戶:zhoujunzhen

  • 基于C8051F005單片機(jī)的參數(shù)測(cè)試儀的設(shè)計(jì)

    介紹了基于單片機(jī)航空交流電參數(shù)測(cè)試儀的系統(tǒng)設(shè)計(jì)。以Silicon Labs公司的C8051F005單片機(jī)為核心設(shè)計(jì)出數(shù)據(jù)采集板,通過RS-232串口與上位機(jī)通訊。運(yùn)用Lab Windows/CVI編寫的上位機(jī)軟件實(shí)現(xiàn)信號(hào)的檢測(cè)以及波形和數(shù)據(jù)的顯示,給出了測(cè)試儀硬件電路的組成和軟件流程圖。本系統(tǒng)具有硬件結(jié)構(gòu)簡(jiǎn)單、容易實(shí)現(xiàn)和成本低等特點(diǎn),在實(shí)際應(yīng)用中其穩(wěn)定性、精確性均能滿足客戶要求。 Abstract:  The design of aeronautics AC parameters tester based on the single-chip is introduced.The core component of data acquisition board is C8051F005 single chip of Silicon Labs Company,and communication with PC through RS-232. The signal processing software programmed with LabWindows/CVI can be used successfully to fulfill inspection of signal and display of the waveform and data. The hardware and software configuration of test instrument are provided.The hardware of the system is simple, and can be easily realized.The stability and precision of the measurement instrument are enough to meet the requirements.

    標(biāo)簽: C8051F005 單片機(jī) 儀的設(shè)計(jì) 參數(shù)測(cè)試

    上傳時(shí)間: 2013-11-18

    上傳用戶:wang5829

  • 基于FPGA+DSP模式的智能相機(jī)設(shè)計(jì)

    針對(duì)嵌入式機(jī)器視覺系統(tǒng)向獨(dú)立化、智能化發(fā)展的要求,介紹了一種嵌入式視覺系統(tǒng)--智能相機(jī)。基于對(duì)智能相機(jī)體系結(jié)構(gòu)、組成模塊和圖像采集、傳輸和處理技術(shù)的分析,對(duì)國內(nèi)外的幾款智能相機(jī)進(jìn)行比較。綜合技術(shù)發(fā)展現(xiàn)狀,提出基于FPGA+DSP模式的硬件平臺(tái),并提出智能相機(jī)的發(fā)展方向。分析結(jié)果表明,該系統(tǒng)設(shè)計(jì)可以實(shí)現(xiàn)脫離PC運(yùn)行,完成圖像獲取與分析,并作出相應(yīng)輸出。 Abstract:  This paper introduced an embedded vision system-intelligent camera ,which was for embedded machine vision systems to an independent and intelligent development requirements. Intelligent camera architecture, component modules and image acquisition, transmission and processing technology were analyzed. After comparing integrated technology development of several intelligent cameras at home and abroad, the paper proposed the hardware platform based on FPGA+DSP models and made clear direction of development of intelligent cameras. On the analysis of the design, the results indicate that the system can run from the PC independently to complete the image acquisition and analysis and give a corresponding output.

    標(biāo)簽: FPGA DSP 模式 智能相機(jī)

    上傳時(shí)間: 2013-10-24

    上傳用戶:bvdragon

  • ZigBee無線傳感網(wǎng)絡(luò)的路由協(xié)議研究

     為滿足無線網(wǎng)絡(luò)技術(shù)具有低功耗、節(jié)點(diǎn)體積小、網(wǎng)絡(luò)容量大、網(wǎng)絡(luò)傳輸可靠等技術(shù)要求,設(shè)計(jì)了一種以MSP430單片機(jī)和CC2420射頻收發(fā)器組成的無線傳感節(jié)點(diǎn)。通過分析其節(jié)點(diǎn)組成,提出了ZigBee技術(shù)中的幾種網(wǎng)絡(luò)拓?fù)湫问剑⒀芯苛薢igBee路由算法。針對(duì)不同的傳輸要求形式選用不同的網(wǎng)絡(luò)拓?fù)湫问娇梢员M大可能地減少系統(tǒng)成本。同時(shí)針對(duì)不同網(wǎng)絡(luò)選用正確的ZigBee路由算法有效地減少了網(wǎng)絡(luò)能量消耗,提高了系統(tǒng)的可靠性。應(yīng)用試驗(yàn)表明,采用ZigBee方式通信可以提高傳輸速率且覆蓋范圍大,與傳統(tǒng)的有線通信方式相比可以節(jié)約40%左右的成本。 Abstract:  To improve the proposed technical requirements such as low-ower, small nodes, large capacity and reliable network transmission, wireless sensor nodes based on MSP430 MCU and CC2420 RF transceiver were designed. This paper provided network topology of ZigBee technology by analysing the component of the nodes and researched ZigBee routing algorithm. Aiming at different requirements of transmission mode to choose the different network topologies form can most likely reduce the system cost. And aiming at different network to choose the correct ZigBee routing algorithm can effectively reduced the network energy consumption and improved the reliability of the system. Results show that the communication which used ZigBee mode can improve the transmission rate, cover more area and reduce 40% cost compared with traditional wired communications mode.

    標(biāo)簽: ZigBee 無線傳感網(wǎng)絡(luò) 協(xié)議研究 路由

    上傳時(shí)間: 2013-10-09

    上傳用戶:robter

  • US Navy VHDL Modelling Guide

      This document was developed under the Standard Hardware and Reliability Program (SHARP) TechnologyIndependent Representation of Electronic Products (TIREP) project. It is intended for use by VHSIC HardwareDescription Language (VHDL) design engineers and is offered as guidance for the development of VHDL modelswhich are compliant with the VHDL Data Item Description (DID DI-EGDS-80811) and which can be providedto manufacturing engineering personnel for the development of production data and the subsequent productionof hardware. Most VHDL modeling performed to date has been concentrated at either the component level orat the conceptual system level. The assembly and sub-assembly levels have been largely disregarded. Under theSHARP TIREP project, an attempt has been made to help close this gap. The TIREP models are based upon lowcomplexity Standard Electronic Modules (SEM) of the format A configuration. Although these modules are quitesimple, it is felt that the lessons learned offer guidance which can readily be applied to a wide range of assemblytypes and complexities.

    標(biāo)簽: Modelling Guide Navy VHDL

    上傳時(shí)間: 2013-11-20

    上傳用戶:pzw421125

  • 基于FPGA+DSP模式的智能相機(jī)設(shè)計(jì)

    針對(duì)嵌入式機(jī)器視覺系統(tǒng)向獨(dú)立化、智能化發(fā)展的要求,介紹了一種嵌入式視覺系統(tǒng)--智能相機(jī)。基于對(duì)智能相機(jī)體系結(jié)構(gòu)、組成模塊和圖像采集、傳輸和處理技術(shù)的分析,對(duì)國內(nèi)外的幾款智能相機(jī)進(jìn)行比較。綜合技術(shù)發(fā)展現(xiàn)狀,提出基于FPGA+DSP模式的硬件平臺(tái),并提出智能相機(jī)的發(fā)展方向。分析結(jié)果表明,該系統(tǒng)設(shè)計(jì)可以實(shí)現(xiàn)脫離PC運(yùn)行,完成圖像獲取與分析,并作出相應(yīng)輸出。 Abstract:  This paper introduced an embedded vision system-intelligent camera ,which was for embedded machine vision systems to an independent and intelligent development requirements. Intelligent camera architecture, component modules and image acquisition, transmission and processing technology were analyzed. After comparing integrated technology development of several intelligent cameras at home and abroad, the paper proposed the hardware platform based on FPGA+DSP models and made clear direction of development of intelligent cameras. On the analysis of the design, the results indicate that the system can run from the PC independently to complete the image acquisition and analysis and give a corresponding output.

    標(biāo)簽: FPGA DSP 模式 智能相機(jī)

    上傳時(shí)間: 2013-11-14

    上傳用戶:無聊來刷下

  • 開關(guān)電源EMI設(shè)計(jì)(英文版)

    Integrated EMI/Thermal Design forSwitching Power SuppliesWei ZhangThesis submitted to the Faculty of theVirginia Polytechnic Institute and State Universityin partial fulfillment of the requirements for the degree of Integrated EMI/Thermal Design forSwitching Power SuppliesWei Zhang(ABSTRACT)This work presents the modeling and analysis of EMI and thermal performancefor switch power supply by using the CAD tools. The methodology and design guidelinesare developed.By using a boost PFC circuit as an example, an equivalent circuit model is builtfor EMI noise prediction and analysis. The parasitic elements of circuit layout andcomponents are extracted analytically or by using CAD tools. Based on the model, circuitlayout and magnetic component design are modified to minimize circuit EMI. EMI filtercan be designed at an early stage without prototype implementation.In the second part, thermal analyses are conducted for the circuit by using thesoftware Flotherm, which includes the mechanism of conduction, convection andradiation. Thermal models are built for the components. Thermal performance of thecircuit and the temperature profile of components are predicted. Improved thermalmanagement and winding arrangement are investigated to reduce temperature.In the third part, several circuit layouts and inductor design examples are checkedfrom both the EMI and thermal point of view. Insightful information is obtained.

    標(biāo)簽: EMI 開關(guān)電源 英文

    上傳時(shí)間: 2013-11-16

    上傳用戶:萍水相逢

  • TheTool is highy customizable map editor(based on QT) which can be extended via LUA scripts. A first

    TheTool is highy customizable map editor(based on QT) which can be extended via LUA scripts. A first implentation is ready and can be published to the public. The editor is the perfect tool who wants to design some 3d games but don t have time to write

    標(biāo)簽: customizable extended TheTool scripts

    上傳時(shí)間: 2013-12-12

    上傳用戶:lanwei

  • This article is based in part on Bob Place s ADO is AOK (a simple ADO tutorial). Wrapper Usage This

    This article is based in part on Bob Place s ADO is AOK (a simple ADO tutorial). Wrapper Usage This is consist of 2 classes. CDyndb : This Class manages connections and recordsets. Recordsets are organized as linked list (CList) and you can access them using their ids. CDynRec : This class is the node to populate for each recordsets. ADO封裝器類 這篇文章一部分基于Bob Place的《ADO is AOK》 (簡(jiǎn)單的ADO指導(dǎo)) 。 包裹的用法 由2個(gè)類組成。 類CDyndb: 這個(gè)類別管理連接和記錄集。記錄集是連接起來的記錄的集合,你可以通過他們的ID訪問他們。 類CDynRec: 這個(gè)類別存放記錄集的代碼。

    標(biāo)簽: This ADO tutorial article

    上傳時(shí)間: 2013-12-14

    上傳用戶:wfl_yy

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