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Coding-Location

  • H.264碼流結(jié)構(gòu)解析

    MPEG(Moving Picture Experts Group)和VCEG(Video Coding Experts Group)已經(jīng)聯(lián)合開發(fā)了一個比早期研發(fā)的MPEG 和H.263 性能更好的視頻壓縮編碼標準,這就是被命名為AVC(Advanced Video Coding),也被稱為ITU-T H.264 建議和MPEG-4 的第10 部分的標準,簡稱為H.264/AVC 或H.264。這個國際標準已經(jīng)與2003 年3 月正式被ITU-T 所通過并在國際上正式頒布。為適應(yīng)高清視頻壓縮的需求,2004 年又增加了FRExt 部分;為適應(yīng)不同碼率及質(zhì)量的需求,2006 年又增加了可伸縮編碼 SVC。

    標簽: 264 碼流

    上傳時間: 2013-11-19

    上傳用戶:dancnc

  • STBC系統(tǒng)在非同分布Nakagami信道下性能評估

    摘  要: 針對非同分布的Nakagami信道,基于矩生成函數(shù)MGF(Moment Generation Function)的分析方法,提出正交空時分組碼系統(tǒng)STBC(Space-Time Block Coding)的一種快速性能評估算法,不需要涉及超幾何函數(shù)積分運算,可在中高信噪比時,快速準確地估計STBC系統(tǒng)的符號錯誤概率性能。在平坦瑞利衰落信道下的計算機仿真表明,該算法與已有的STBC系統(tǒng)的近似估計算法相比,具有較優(yōu)的性能。      關(guān)鍵詞: 正交空時分組碼; MIMO; MGF; 誤符號率  

    標簽: Nakagami STBC 分布

    上傳時間: 2014-12-29

    上傳用戶:如果你也聽說

  • 克服了正交頻分復(fù)用(OFDM)和IEEE 1901.2智能電網(wǎng)通信的挑戰(zhàn)

    Abstract: While many questions still surround the creation and deployment of the smart grid, the need for a reliablecommunications infrastructure is indisputable. Developers of the IEEE 1901.2 standard identified difficult channel conditionscharacteristic of low-frequency powerline communications and implemented an orthogonal frequency division multiplexing (OFDM)architecture using advanced modulation and channel-coding techniques. This strategy helped to ensure a robust communicationsnetwork for the smart grid.

    標簽: 1901.2 OFDM IEEE 正交頻分復(fù)用

    上傳時間: 2013-10-18

    上傳用戶:myworkpost

  • Actel HDL Coding

    叫你如何擁有良好的編碼風(fēng)格

    標簽: Coding Actel HDL

    上傳時間: 2014-01-04

    上傳用戶:s藍莓汁

  • Verilog編碼中的非阻塞性賦值

      One of the most misunderstood constructs in the Verilog language is the nonblockingassignment. Even very experienced Verilog designers do not fully understand how nonblockingassignments are scheduled in an IEEE compliant Verilog simulator and do not understand whenand why nonblocking assignments should be used. This paper details how Verilog blocking andnonblocking assignments are scheduled, gives important coding guidelines to infer correctsynthesizable logic and details coding styles to avoid Verilog simulation race conditions

    標簽: Verilog 編碼 非阻塞性賦值

    上傳時間: 2013-11-01

    上傳用戶:xzt

  • Guide to HDL Coding Styles for Synthesis

    這篇文章討論了不同HDL代碼的編寫方式,對綜合結(jié)果的影響。閱讀本文對深入了解綜合工具和提高HDL的編寫水平有不少幫助,原文時針對Synopsys的綜合軟件論述的,但對所有綜合軟件,都有普遍的借鑒意義  

    標簽: Synthesis Coding Styles Guide

    上傳時間: 2014-01-11

    上傳用戶:亞亞娟娟123

  • This hands-on, one-stop guide delivers the focused, streamlined direction you need to get your Web s

    This hands-on, one-stop guide delivers the focused, streamlined direction you need to get your Web solutions up and running quickly. Zero in on key ASP.NET configuration details and techniques using quick-reference tables, lists, coding and more.

    標簽: streamlined direction hands-on delivers

    上傳時間: 2015-01-11

    上傳用戶:Thuan

  • In each step the LZSS algorithm sends either a character or a <position, length> pair. Among t

    In each step the LZSS algorithm sends either a character or a <position, length> pair. Among these, perhaps character "e" appears more frequently than "x", and a <position, length> pair of length 3 might be commoner than one of length 18, say. Thus, if we encode the more frequent in fewer bits and the less frequent in more bits, the total length of the encoded text will be diminished. This consideration suggests that we use Huffman or arithmetic coding, preferably of adaptive kind, along with LZSS.

    標簽: algorithm character position either

    上傳時間: 2014-01-27

    上傳用戶:wang0123456789

  • 嵌入式文件系統(tǒng)ucfs.zip This project should serve as an "easy start" with /FS. All paths are relative to t

    嵌入式文件系統(tǒng)ucfs.zip This project should serve as an "easy start" with /FS. All paths are relative to the project file. You should therefore be able to copy the entire directory (including all subdirectories) to any location on your harddrive.

    標簽: relative project should paths

    上傳時間: 2015-04-28

    上傳用戶:zhliu007

  • Attributes, Constraints, and Carry Logic Overview Information for Mentor Customers Schematic S

    Attributes, Constraints, and Carry Logic Overview Information for Mentor Customers Schematic Syntax UCF/NCF File Syntax Attributes/Logical Constraints Placement Constraints Relative Location (RLOC) Constraints Timing Constraints Physical Constraints Relationally Placed Macros (RPM) Carry Logic in XC4000 FPGAs Carry Logic in XC5200 FPGAs

    標簽: Constraints Information Attributes Customers

    上傳時間: 2015-05-12

    上傳用戶:cc1015285075

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