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ControlLER

  • PCA9541 2 to 1 I2C-bus master

    The PCA9541 is a 2-to-1 I2C-bus master selector designed for high reliability dual masterI2C-bus applications where system operation is required, even when one master fails orthe ControlLER card is removed for maintenance. The two masters (for example, primaryand back-up) are located on separate I2C-buses that connect to the same downstreamI2C-bus slave devices. I2C-bus commands are sent by either I2C-bus master and are usedto select one master at a time. Either master at any time can gain control of the slavedevices if the other master is disabled or removed from the system. The failed master isisolated from the system and will not affect communication between the on-line masterand the slave devices on the downstream I2C-bus.

    標(biāo)簽: master C-bus 9541 PCA

    上傳時(shí)間: 2013-10-09

    上傳用戶(hù):3294322651

  • TJA1042 High-speed CAN transce

    The TJA1042 is a high-speed CAN transceiver that provides an interface between aControlLER Area Network (CAN) protocol ControlLER and the physical two-wire CAN bus.The transceiver is designed for high-speed (up to 1 Mbit/s) CAN applications in theautomotive industry, providing the differential transmit and receive capability to (amicroControlLER with) a CAN protocol ControlLER.

    標(biāo)簽: High-speed transce 1042 TJA

    上傳時(shí)間: 2014-12-28

    上傳用戶(hù):氣溫達(dá)上千萬(wàn)的

  • TJA1051 High-speed CAN transce

    The TJA1051 is a high-speed CAN transceiver that provides an interface between aControlLER Area Network (CAN) protocol ControlLER and the physical two-wire CAN bus.The transceiver is designed for high-speed (up to 1 Mbit/s) CAN applications in theautomotive industry, providing differential transmit and receive capability to (amicroControlLER with) a CAN protocol ControlLER.

    標(biāo)簽: High-speed transce 1051 TJA

    上傳時(shí)間: 2013-10-17

    上傳用戶(hù):jisujeke

  • 3-V TO 5.5-V MULTICHANNEL RS-2

    The MAX3243E device consists of three line drivers, five line receivers, and a dual charge-pump circuit with±15-kV ESD (HBM and IEC61000-4-2, Air-Gap Discharge) and ±8-kV ESD (IEC61000-4-2, Contact Discharge)protection on serial-port connection pins. The device meets the requirements of TIA/EIA-232-F and provides theelectrical interface between an asynchronous communication ControlLER and the serial-port connector. Thiscombination of drivers and receivers matches that needed for the typical serial port used in an IBM PC/AT, orcompatible. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-Vsupply. In addition, the device includes an always-active noninverting output (ROUT2B), which allowsapplications using the ring indicator to transmit data while the device is powered down. The device operates atdata signaling rates up to 250 kbit/s and a maximum of 30-V/ms driver output slew rate.

    標(biāo)簽: MULTICHANNEL 5.5 TO RS

    上傳時(shí)間: 2013-10-19

    上傳用戶(hù):ddddddd

  • 基于8086 CPU 的單芯片計(jì)算機(jī)系統(tǒng)的設(shè)計(jì)

    本文依據(jù)集成電路設(shè)計(jì)方法學(xué),探討了一種基于標(biāo)準(zhǔn)Intel 8086 微處理器的單芯片計(jì)算機(jī)平臺(tái)的架構(gòu)。研究了其與SDRAM,8255 并行接口等外圍IP 的集成,并在對(duì)AMBA協(xié)議和8086 CPU分析的基礎(chǔ)上,采用遵從AMBA傳輸協(xié)議的系統(tǒng)總線代替?zhèn)鹘y(tǒng)的8086 CPU三總線結(jié)構(gòu),搭建了基于8086 IP 軟核的單芯片計(jì)算機(jī)系統(tǒng),并實(shí)現(xiàn)了FPGA 功能演示。關(guān)鍵詞:微處理器; SoC;單芯片計(jì)算機(jī);AMBA 協(xié)議 Design of 8086 CPU Based Computer-on-a-chip System(School of Electrical Engineering and Automation, Heifei University of Technology, Hefei, 230009,China)Abstract: According to the IC design methodology, this paper discusses the design of one kind of Computer-on-a-chip system architecture, which is based on the standard Intel8086 microprocessor,investigates how to integrate the 8086 CPU and peripheral IP such as, SDRAM ControlLER, 8255 PPI etc. Based on the analysis of the standard Intel8086 microprocessor and AMBA Specification,the Computer-on-a-chip system based on 8086 CPU which uses AMBA bus instead of traditional three-bus structure of 8086 CPU is constructed, and the FPGA hardware emulation is fulfilled.Key words: Microprocessor; SoC; Computer-on-a-chip; AMBA Specification

    標(biāo)簽: 8086 CPU 單芯片 計(jì)算機(jī)系統(tǒng)

    上傳時(shí)間: 2013-12-27

    上傳用戶(hù):kernor

  • 基于單片機(jī)的步進(jìn)電機(jī)開(kāi)環(huán)控制系統(tǒng)

    基于單片機(jī)的步進(jìn)電機(jī)開(kāi)環(huán)控制系統(tǒng):通過(guò)ATMEL89C51單片機(jī)對(duì)步進(jìn)電機(jī)進(jìn)行控制,主要介紹了步進(jìn)電機(jī)控制器、驅(qū)動(dòng)電路和LED顯示電路的設(shè)計(jì),實(shí)現(xiàn)了步進(jìn)電機(jī)的開(kāi)環(huán)控制。在步進(jìn)電機(jī)控制器的設(shè)計(jì)中,重點(diǎn)闡述了脈沖產(chǎn)生電路以及對(duì)速度的控制。該系統(tǒng)具有成本低、控制方便的特點(diǎn)。關(guān)鍵詞: 單片機(jī); 步進(jìn)電機(jī); 開(kāi)環(huán)控制 Abstract: The design using ATMEL89C51 single chip to control the step2motor with its ControlLER, driving circuit and LED disp lay circuit to realize step motor open2loop controlwere introduced. For the ControlLER in this design,the circuit to p roduce pulse and the speed controlwere expatiated emphatically. This system possesses features of lower cost, easier control.Key words: single ch ip; step2motor; open2loop con trol

    標(biāo)簽: 單片機(jī) 步進(jìn)電機(jī) 開(kāi)環(huán) 控制系統(tǒng)

    上傳時(shí)間: 2013-10-13

    上傳用戶(hù):cicizoe

  • 基于單片機(jī)的除塵控制器的設(shè)計(jì)

    基于單片機(jī)的除塵控制器的設(shè)計(jì):介紹通用控制儀的硬件組成和軟件設(shè)計(jì),闡述了系統(tǒng)的性能指標(biāo)和功能特點(diǎn)。該產(chǎn)品功能完善,可靠性高,具有很好的應(yīng)用前景。關(guān)鍵詞: 除塵器;通用控制儀;單片機(jī);系統(tǒng)設(shè)計(jì) Abstract: The hardware structure and the software design are introduced in this paper, and the performance index and the features of the system are expounded. It has comp rehensive functions, high reliability and good app lication.Key words: dust catcher; universal ControlLER; microControlLER; system design

    標(biāo)簽: 單片機(jī) 除塵 控制器

    上傳時(shí)間: 2013-11-16

    上傳用戶(hù):ming52900

  • 可編程中斷控制器82C59A-2

    82C59A-2是為簡(jiǎn)化微處理機(jī)系統(tǒng)中斷接口而實(shí)現(xiàn)的LSI外圍芯片。也叫做PIC(Programmable Interrupt ControlLER)。是高性能高速度芯片。在多級(jí)優(yōu)先級(jí)中斷系統(tǒng)內(nèi)82C59A-1402已經(jīng)把CPU從對(duì)任務(wù)的輪詢(xún)中解救出來(lái)。PCI可由軟件進(jìn)行控制,使用于各種不同的環(huán)境,聯(lián)級(jí)可接受8~64個(gè)中斷輸入。 管腳與NMOS8259A-2兼容單片8級(jí)優(yōu)先級(jí),級(jí)聯(lián)可擴(kuò)64級(jí)多種可編程中斷方式各自專(zhuān)用的請(qǐng)求屏蔽能力與Intel系列機(jī)兼容全部采用靜態(tài)設(shè)計(jì)低功耗5V的電源供電。

    標(biāo)簽: 82 59 可編程 中斷控制器

    上傳時(shí)間: 2013-10-30

    上傳用戶(hù):zhliu007

  • 基于單片機(jī)控制的二氧化碳濃度測(cè)試計(jì)

    基于單片機(jī)控制的二氧化碳濃度測(cè)試計(jì):基于CDM4161二氧化碳?xì)怏w濃度測(cè)試模塊以及ATtiny26單片機(jī),提出了一種二氧化碳濃度測(cè)試計(jì)的設(shè)計(jì)方案。該方案具有硬件電路簡(jiǎn)單、成本低、可靠性高、測(cè)量準(zhǔn)確等優(yōu)點(diǎn),具有較高的實(shí)用價(jià)值。 Abstract: Abstract:A desigh scheme of CO2 concentration meter based on CDM4161carbon dioxide concentration test module and ATtiny26micro-ControlLER is presented in this paper.The design scheme features simple hardware circuit,low-cost,high reli-ability,accurate measurement and it has a high practical value.

    標(biāo)簽: 單片機(jī)控制 二氧化碳 測(cè)試

    上傳時(shí)間: 2013-11-14

    上傳用戶(hù):zjwangyichao

  • MPC106 PCI橋/存儲(chǔ)器控制器硬件規(guī)范說(shuō)明

    The Motorola MPC106 PCI bridge/memory ControlLER provides a PowerPCªmicroprocessor common hardware reference platform (CHRPª) compliant bridgebetween the PowerPC microprocessor family and the Peripheral Component Interconnect(PCI) bus. In this document, the term Ô106Õ is used as an abbreviation for the phraseÔMPC106 PCI bridge/memory ControlLERÕ. This document contains pertinent physicalcharacteristics of the 106. For functional characteristics refer to theMPC106 PCI Bridge/Memory ControlLER UserÕs Manual.This document contains the following topics:Topic PageSection 1.1, ÒOverviewÓ 2Section 1.2, ÒFeaturesÓ 3Section 1.3, ÒGeneral ParametersÓ 5Section 1.4, ÒElectrical and Thermal CharacteristicsÓ 5Section 1.5, ÒPin AssignmentsÓ 17Section 1.6, ÒPinout Listings 18Section 1.7, ÒPackage DescriptionÓ 22Section 1.8, ÒSystem Design InformationÓ 24Section 1.9, ÒDocument Revision HistoryÓ 29Section 1.10, ÒOrdering InformationÓ 29

    標(biāo)簽: MPC 106 PCI 存儲(chǔ)器

    上傳時(shí)間: 2013-11-04

    上傳用戶(hù):as275944189

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