The AT89C52 is a low-power, high-performance CMOS 8-bit microcomputer with 8Kbytes of Flash programmable and erasable read only memory (PEROM). The deviceis manufactured using Atmel’s high-density nonvolatile memory technology and iscompatible with the industry-standard 80C51 and 80C52 instruction set and pinout.The on-chip Flash allows the program memory to be reprogrammed in-system or by aConventional nonvolatile memory programmer. By combining a versatile 8-bit CPUwith Flash on a monolithic chip, the Atmel AT89C52 is a powerful microcomputerwhich provides a highly-flexible and cost-effective solution to many embedded controlapplications.
上傳時間： 2013-11-10
上傳用戶：1427796291
同步技術是跳頻通信系統的關鍵技術之一，尤其是在快速跳頻通信系統中，常規跳頻通信通過同步字頭攜帶相關碼的方法來實現同步，但對于快跳頻來說，由于是一跳或者多跳傳輸一個調制符號，難以攜帶相關碼。對此引入雙跳頻圖案方法，提出了一種適用于快速跳頻通信系統的同步方案。采用短碼攜帶同步信息，克服了快速跳頻難以攜帶相關碼的困難。分析了同步性能，仿真結果表明該方案同步時間短、虛警概率低、捕獲概率高，同步性能可靠。 Abstract: Synchronization is one of the key techniques to frequency-hopping communication system， especially in the fast frequency hopping communication system. In Conventional frequency hopping communication systems， synchronization can be achieved by synchronization-head which can be used to carry the synchronization information， but for the fast frequency hopping， Because modulation symbol is transmitted by per hop or multi-hop， it is difficult to carry the correlation code. For the limitation of fast frequency hopping in carrying correlation code， a fast frequency-hopping synchronization scheme with two hopping patterns is proposed. The synchronization information is carried by short code， which overcomes the difficulty of correlation code transmission in fast frequency-hopping. The performance of the scheme is analyzed， and simulation results show that the scheme has the advantages of shorter synchronization time， lower probability of false alarm， higher probability of capture and more reliable of synchronization.
上傳時間： 2013-11-23
上傳用戶：mpquest
The super-junction structure, which has P-type pillar layers as shown left, realizes high withstand voltage and ON-resistance lower than the Conventional theoretical limit of silicon.
上傳時間： 2014-12-31
上傳用戶：qwer0574
1.什么是CTP? CTP包括幾種含義: 脫機直接制版(Computer-to-plate) 在機直接制版(Computer-to-press) 直接印刷(Computer-to-paper/print) 數字打樣(Computer-to-proof) 普通PS版直接制版技術,即CTcP(Computer-to-Conventional plate) 這里所論述的CTP系統是脫機直接制版(Computer-to-plate)。CTP就是計算機直接到印版，是一種數字化印版成像過程。CTP直接制版機與照排機結構原理相仿。起制版設備均是用計算機直接控制，用激光掃描成像，再通過顯影、定影生成直接可上機印刷的印版。計算機直接制版是采用數字化工作流程，直接將文字、圖象轉變為數字，直接生成印版，省去了膠片這一材料、人工拼版的過程、半自動或全自動曬版工序。
標簽： CTP
上傳時間： 2014-01-22
上傳用戶：魚哥哥你好
Welcome to PMOS. PMOS is a set of modules, mostly written in Modula-2, to support multitasking. PMOS was designed primarily with real-time applications in mind. It is not an operating system in the Conventional sense rather, it is a collection of modules which you can import into your own programs, and which in particular allow you to write multi-threaded programs.
標簽： PMOS multitasking Welcome modules
上傳時間： 2015-07-10
上傳用戶：windwolf2000
http://w3eval.calcsharp.net/ W3Eval is Java applet that evaluates mathematical expressions. It uses different approach from Conventional calculator, which is more natural to the way people calculate.
標簽： mathematical expressions calcsharp evaluates
上傳時間： 2013-12-13
上傳用戶：youke111
In recent years large scientific interest has been devoted to joint data decoding and parameter estimation techniques. In this paper, iterative turbo decoding joint to channel frequency and phase estimation is proposed. The phase and frequency estimator is embedded into the structure of the turbo decoder itself, taking into consideration both turbo interleaving and puncturing. Results show that the proposed technique outperforms Conventional approaches both in terms of detection capabilities and implementation complexity.
標簽： scientific parameter interest decoding
上傳時間： 2015-12-30
上傳用戶：894898248
Easy-to-Use, Ultra-Tiny, Differential, 16-Bit Delta Sigma ADC With I2C Interface The LTC2453 is an ultra-tiny, fully differential, 16-bit, analog-to-digital converter. The LTC2453 uses a single 2.7V to 5.5V supply and communicates through an I2C interface. The ADC is available in an 8-pin, 3mm x 2mm DFN package. It includes an integrated oscillator that does not require any external components. It uses a delta-sigma modulator as a converter core and has no latency for multiplexed applications. The LTC2453 includes a proprietary input sampling scheme that reduces the average input sampling current several orders of magnitude lower than Conventional delta-sigma converters. Additionally, due to its architecture, there is negligible current leakage between the input pins.
標簽： Differential Easy-to-Use Ultra-Tiny Interface
上傳時間： 2014-01-08
上傳用戶：鳳臨西北
The buffers allow receiving of data while a page in the main memory is being reprogrammed. Unlike Conventional Flash
標簽： reprogrammed receiving buffers Unlike
上傳時間： 2014-01-09
上傳用戶：aig85
1 Array Fundamentals 1.1 Spatial Signals 1.2 Array Signal Model 1.3 Spatial Sampling 2 Conventional Spatial Filtering: beamforming - Beam response 2.1 Spatial Matched Filter -Element spacing -Array aperture and resolution 3 Conclusions
標簽： Spatial Array Fundamentals Conventio
上傳時間： 2017-04-17
上傳用戶：jiahao131
