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DATa-driven

  • MySQL and JSP Web Applications - DATa-driven Programming Using Tomcat and MySQL

    MySQL and JSP Web Applications - DATa-driven Programming Using Tomcat and MySQL

    標(biāo)簽: MySQL Applications DATa-driven Programming

    上傳時(shí)間: 2013-12-28

    上傳用戶(hù):huql11633

  • This application provides much functionality for creating DATa-driven reports, including preview, gr

    This application provides much functionality for creating DATa-driven reports, including preview, graphics, and formatting. There is no documentation so you may have to work with it awhile, but there is a demo on how to use it, and the functionality is rich.

    標(biāo)簽: functionality application DATa-driven including

    上傳時(shí)間: 2017-07-21

    上傳用戶(hù):skhlm

  • EDA分布估計(jì)算法經(jīng)典論文

    壓縮包中有5篇論文,分別為《DATa-driven analysis of variables and dependencies in continuous optimization problems and EDAs》這是一篇博士論文,較為詳細(xì)的介紹了各種EDA算法;《Anisotropic adaptive variance scaling for Gaussian estimation of distribution algorithm》《Enhancing Gaussian Estimation of Distribution Algorithm by Exploiting Evolution Direction with Archive》《Niching an Archive-based Gaussian Estimation of Distribution Algorithm via Adaptive Clustering》《Supplementary material for Enhancing Gaussian Estimation of Distribution Algorithm by Exploiting Evolution Direction with Archive》《基于一般二階混合矩的高斯分布估計(jì)算法》介紹了一些基于EDA的創(chuàng)新算法。

    標(biāo)簽: EDA 分布估計(jì)算法 論文

    上傳時(shí)間: 2020-05-25

    上傳用戶(hù):duwenhao

  • Service Delivery Platforms

    Convergence between the two largest networks (Telecom and IP) is taking place very rapidly and at diff erent levels: (1) network level: unifi cation of IP networks with traditional Telecom networks through evolving standards (Session Initiation Protocol (SIP), Realtime Transfer Protocol (RTP), SS7, 3G) to support interopera- bility; (2) service level: traditional Telecom services like voice calls are being provi- sioned on the IP backbone (VoIP), while traditional IP services (most DATa-driven services such as multimedia, browsing, chatting, gaming, etc.) are accessible over the Telecom network.

    標(biāo)簽: Platforms Delivery Service

    上傳時(shí)間: 2020-06-01

    上傳用戶(hù):shancjb

  • Smart Homes

    In this research, we have designed, developed implemented a wireless sensor networks based smart home for safe, sound and secured living environment for any inhabitant especially elderly living alone. We have explored a methodology for the development of efficient electronic real time data processing system to recognize the behaviour of an elderly person. The ability to determine the wellness of an elderly person living alone in their own home using a robust, flexible and data driven artificially intelligent system has been investigated. A framework integrating temporal and spatial contextual information for determining the wellness of an elderly person has been modelled. A novel behaviour detection process based on the observed sensor data in performing essential daily activities has been designed and developed.

    標(biāo)簽: Smart Homes

    上傳時(shí)間: 2020-06-06

    上傳用戶(hù):shancjb

  • 英文名為:《Data.Protection.and.Information.Lifecycle.Management》內(nèi)容為:數(shù)據(jù)維護(hù)計(jì)劃的統(tǒng)一框架

    英文名為:《Data.Protection.and.Information.Lifecycle.Management》內(nèi)容為:數(shù)據(jù)維護(hù)計(jì)劃的統(tǒng)一框架,數(shù)據(jù)維護(hù)的策略標(biāo)準(zhǔn),使用政策驅(qū)動(dòng)(policy-driven)數(shù)據(jù)維護(hù)及數(shù)據(jù)生命周期(DLM)管理來(lái)提高安全、降低成本等。

    標(biāo)簽: Information Protection Management Lifecycle

    上傳時(shí)間: 2014-01-08

    上傳用戶(hù):banyou

  • 游戲開(kāi)發(fā)數(shù)據(jù)結(jié)構(gòu)-Data.Structures.for.Game.Programmers

    游戲開(kāi)發(fā)數(shù)據(jù)結(jié)構(gòu)-Data.Structures.for.Game.Programmers

    標(biāo)簽: Programmers Structures Data Game

    上傳時(shí)間: 2013-06-10

    上傳用戶(hù):eeworm

  • Can convert data file(txt format)to CAD(scr)file,and draw curve!

    Can convert data file(txt format)to CAD(scr)file,and draw curve!

    標(biāo)簽: file convert format curve

    上傳時(shí)間: 2013-09-11

    上傳用戶(hù):天空說(shuō)我在

  • 用于信號(hào)調(diào)理的微電路

      Low power operation of electronic apparatus has becomeincreasingly desirable. Medical, remote data acquisition,power monitoring and other applications are good candidatesfor battery driven, low power operation. Micropoweranalog circuits for transducer-based signal conditioningpresent a special class of problems. Although micropowerICs are available, the interconnection of these devices toform a functioning micropower circuit requires care. (SeeBox Sections, “Some Guidelines for Micropower Designand an Example” and “Parasitic Effects of Test Equipmenton Micropower Circuits.”) In particular, trade-offs betweensignal levels and power dissipation become painful whenperformance in the 10-bit to 12-bit area is desirable.

    標(biāo)簽: 信號(hào)調(diào)理 微電路

    上傳時(shí)間: 2013-10-22

    上傳用戶(hù):rocketrevenge

  • XAPP740利用AXI互聯(lián)設(shè)計(jì)高性能視頻系統(tǒng)

    This application note covers the design considerations of a system using the performance features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The design focuses on high system throughput through the AXI Interconnect core with F MAX  and area optimizations in certain portions of the design. The design uses five AXI video direct memory access (VDMA) engines to simultaneously move 10 streams (five transmit video streams and five receive video streams), each in 1920 x 1080p format, 60 Hz refresh rate, and up to 32 data bits per pixel. Each VDMA is driven from a video test pattern generator (TPG) with a video timing controller (VTC) block to set up the necessary video timing signals. Data read by each AXI VDMA is sent to a common on-screen display (OSD) core capable of multiplexing or overlaying multiple video streams to a single output video stream. The output of the OSD core drives the DVI video display interface on the board. Performance monitor blocks are added to capture performance data. All 10 video streams moved by the AXI VDMA blocks are buffered through a shared DDR3 SDRAM memory and are controlled by a MicroBlaze™ processor. The reference system is targeted for the Virtex-6 XC6VLX240TFF1156-1 FPGA on the Xilinx® ML605 Rev D evaluation board

    標(biāo)簽: XAPP 740 AXI 互聯(lián)

    上傳時(shí)間: 2013-11-14

    上傳用戶(hù):fdmpy

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