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DISTRIBUTE

  • 硬件設(shè)計(jì)vhdl_cpu1,1. You may copy and DISTRIBUTE verbatim copies of this core, as long -- as this file,

    硬件設(shè)計(jì)vhdl_cpu1,1. You may copy and DISTRIBUTE verbatim copies of this core, as long -- as this file, and the other associated files, remain intact and -- unmodified. Modifications are outlined below.

    標(biāo)簽: this DISTRIBUTE vhdl_cpu verbatim

    上傳時(shí)間: 2015-03-20

    上傳用戶(hù):aa17807091

  • [Server]DISTRIBUTE.rar這個(gè)是分發(fā)服務(wù)器的源碼

    [Server]DISTRIBUTE.rar這個(gè)是分發(fā)服務(wù)器的源碼,有時(shí)間的要好好學(xué)學(xué)。

    標(biāo)簽: DISTRIBUTE Server

    上傳時(shí)間: 2013-12-22

    上傳用戶(hù):lanhuaying

  • This project aims to DISTRIBUTE a facial animation system with speech, developed to brazilian portug

    This project aims to DISTRIBUTE a facial animation system with speech, developed to brazilian portuguese case. This system is composed by many modules: movement extraction, facial animation and speech, through a text-to-speech system.

    標(biāo)簽: DISTRIBUTE animation developed brazilian

    上傳時(shí)間: 2016-01-23

    上傳用戶(hù):無(wú)聊來(lái)刷下

  • Permission is granted to copy, DISTRIBUTE and/or modify this document under the terms of the GNU Fr

    Permission is granted to copy, DISTRIBUTE and/or modify this document under the terms of the GNU Free Documentation License, Version 1.1 or any later version published by the Free Software Foundation with no Invariant Sections, with no Front- Cover Texts, and with no Back-Cover Texts. A copy of the license is included in the section entitled “GNU Free Documentation License”.

    標(biāo)簽: Permission DISTRIBUTE the document

    上傳時(shí)間: 2016-11-30

    上傳用戶(hù):lxm

  • Shows how Linux futex syscall can be used to DISTRIBUTE computation to multiple threads.

    Shows how Linux futex syscall can be used to DISTRIBUTE computation to multiple threads.

    標(biāo)簽: computation DISTRIBUTE multiple syscall

    上傳時(shí)間: 2017-02-20

    上傳用戶(hù):dave520l

  • MFSK CODE AND ENJOY UR SELF TO DISTRIBUTE

    MFSK CODE AND ENJOY UR SELF TO DISTRIBUTE

    標(biāo)簽: DISTRIBUTE ENJOY MFSK CODE

    上傳時(shí)間: 2014-01-03

    上傳用戶(hù):1051290259

  • Virtex-6 FPGA PCB設(shè)計(jì)手冊(cè)

    Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the developmentof designs to operate with Xilinx hardware devices. You may not reproduce, DISTRIBUTE, republish, download, display, post, or transmit theDocumentation in any form or by any means including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise,without the prior written consent of Xilinx. Xilinx expressly disclaims any liability arising out of your use of the Documentation. Xilinx reservesthe right, at its sole discretion, to change the Documentation without notice at any time. Xilinx assumes no obligation to correct any errorscontained in the Documentation, or to advise you of any corrections or updates. Xilinx expressly disclaims any liability in connection withtechnical support or assistance that may be provided to you in connection with the Information.

    標(biāo)簽: Virtex FPGA PCB 設(shè)計(jì)手冊(cè)

    上傳時(shí)間: 2014-01-13

    上傳用戶(hù):竺羽翎2222

  • CPLD庫(kù)指南

    Xilinx is disclosing this user guide, manual, release note, and/or specification (the “Documentation”) to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, DISTRIBUTE, republish, download, display, post, or transmit the Documentation in any form or by any means including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise, without the prior written consent of Xilinx. Xilinx expressly disclaims any liability arising out of your use of the Documentation. Xilinx reserves the right, at its sole discretion, to change the Documentation without notice at any time. Xilinx assumes no obligation to correct any errors contained in the Documentation, or to advise you of any corrections or updates. Xilinx expressly disclaims any liability in connection with technical support or assistance that may be provided to you in connection with the Information.  

    標(biāo)簽: CPLD

    上傳時(shí)間: 2013-10-22

    上傳用戶(hù):李哈哈哈

  • 基于以太網(wǎng)分布式的數(shù)據(jù)采集控制系統(tǒng)

    針對(duì)飛行模擬器座艙數(shù)據(jù)采集的復(fù)雜性,設(shè)計(jì)了一種基于以太網(wǎng)分布式的數(shù)據(jù)采集控制系統(tǒng),該系統(tǒng)是RCM5700微處理器模塊上的以太網(wǎng)應(yīng)用。在系統(tǒng)的基礎(chǔ)上具體討論了PoE技術(shù)的應(yīng)用,在傳輸數(shù)據(jù)的網(wǎng)線(xiàn)上同時(shí)提供電流,提出并實(shí)現(xiàn)了一種包括輔助電源在內(nèi)的完整可靠的PoE供電方案。設(shè)計(jì)采用美國(guó)國(guó)家半導(dǎo)體的LM5073和LM5576并根據(jù)不同的負(fù)載情況,進(jìn)行穩(wěn)定可靠的電壓轉(zhuǎn)換,以滿(mǎn)足數(shù)據(jù)采集電路的要求。實(shí)驗(yàn)結(jié)果表明:該設(shè)計(jì)穩(wěn)定可靠,滿(mǎn)足低于13 W的采集節(jié)點(diǎn)供電要求,提高了模擬器信號(hào)采集系統(tǒng)的通用性和標(biāo)準(zhǔn)化程度,避免了以往數(shù)據(jù)采集節(jié)點(diǎn)單獨(dú)繁瑣的電源設(shè)計(jì)。 Abstract:  Aiming at the complexity of large avion simulation and controlling,the simulator cabin DISTRIBUTE data collecting and control system was designed. This system is the application of RCM5700 on Ethernet. Based on this system,PoE technique that makes Ethernet can also provide power were expounded with emphasis and included FAUX design the PoE resolution was realized. To achieve the requirement of this system,LM5073 and LM5576 were used to DC-DC switch. From the data of experiment,the design filled the requirement of power-need of node whose power was lower than 13W. The application of the technique can advance the degree of simulation data collections currency and standardization and avoid designing additional power system.

    標(biāo)簽: 以太網(wǎng) 分布式 數(shù)據(jù)采集 控制系統(tǒng)

    上傳時(shí)間: 2013-11-09

    上傳用戶(hù):xyipie

  • Virtex-6 FPGA PCB設(shè)計(jì)手冊(cè)

    Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the developmentof designs to operate with Xilinx hardware devices. You may not reproduce, DISTRIBUTE, republish, download, display, post, or transmit theDocumentation in any form or by any means including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise,without the prior written consent of Xilinx. Xilinx expressly disclaims any liability arising out of your use of the Documentation. Xilinx reservesthe right, at its sole discretion, to change the Documentation without notice at any time. Xilinx assumes no obligation to correct any errorscontained in the Documentation, or to advise you of any corrections or updates. Xilinx expressly disclaims any liability in connection withtechnical support or assistance that may be provided to you in connection with the Information.

    標(biāo)簽: Virtex FPGA PCB 設(shè)計(jì)手冊(cè)

    上傳時(shí)間: 2013-11-11

    上傳用戶(hù):zwei41

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