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24C04 中文開發文檔 data sheet-24C04 data sheet in Chinese Development DOCUMENTATION
標簽：
Chinese_datasheet
24
04
上傳時間：
2013-06-22
上傳用戶：壞壞的華仔
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We provide complete power solutions with a full lineup of power managementproducts. This brochure provides an overview of our high performance DC/DC switching regulatorcontrollers for applications including datacom, telecom, industrial, automotive, medical, avionicsand control systems. We make power design easier with our industry-leading field applicationengineering support; a broad selection of demonstration boards with schematics, layout filesand parts lists; SwitcherCAD® software for simulation, application notes and comprehensivetechnical DOCUMENTATION.
標簽：
DCDC
性能
控制器
上傳時間：
2013-10-15
上傳用戶：lz4v4
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Important Notice SUNPLUS INNOVATION TECHNOLOGY INC. reserves the right to change this DOCUMENTATION without prior notice. Information provided by SUNPLUS INNOVATION TECHNOLOGY INC. is believed to be accurate and reliable. However, SUNPLUS INNOVATION TECHNOLOGY INC.makes no warranty for any errors which may appear in this document. Contact SUNPLUS INNOVATION TECHNOLOGY INC.to obtain the latest version of device specifications before placing your order. No responsibility is assumed by SUNPLUS INNOVATION TECHNOLOGY INC. for any infringement of patent or other rights of third parties which may result from its use. In addition, SUNPLUSIT products are not authorized for use as critical components in life support systems or aviation systems, where a malfunction or failure of the product may reasonably be expected to result in significant injury to the user, without the express written approval of SunplusIT
標簽：
SUNPLUSIT
Q-Writer
編程工具
使用說明書
上傳時間：
2013-10-13
上傳用戶：brain kung
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The MSP-FET430PIF is a Parallel Port interface (does not include target board) that is used to program and debug MSP430 FET tools and test boards through the JTAG interface. This interface is included in our FET tools, but sold without the development board. This interface uses a Parallel PC Port to communicate to the Debugger Software (IAR Kickstart software included) running on the PC. The interface uses the standard 14 pin header to communicate to the MSP430 device using the standard JTAG protocol.
The flash memory can be erased and programmed in seconds with only a few keystrokes, and since the MSP430 flash is extremely low power, no external power supply is required. The tool has an integrated software environment and connects directly to the PC which greatly simplifies the set-up and use of the tool. The flash development tool supports development with all MSP430 flash parts.
Features
MSP430 debugging interface to connect a MSP430-Flash-device to a Parallel port on a PC
Supports JTAG debug protocol (NO support for Spy-Bi-Wire (2-wire JTAG) debug protocol, Spy-Bi-Wire (2-wire JTAG) is supported by MSP-FET430UIF)
Parallel Port cable and a 14-conductor target cable
Full DOCUMENTATION on CD ROM
Integrated IAR Kickstart user interface which includes:
Assembler
Linker
Limulator
Source-level debugger
Limited C-compiler
Technical specifications:
Backwardly compatable with existing FET tool boards.
標簽：
FET
430
PIF
上傳時間：
2013-10-26
上傳用戶：fengweihao158@163.com
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Xilinx is disclosing this user guide, manual, release note, and/or specification (the "DOCUMENTATION") to you solely for use in the developmentof designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit theDOCUMENTATION in any form or by any means including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise,without the prior written consent of Xilinx. Xilinx expressly disclaims any liability arising out of your use of the DOCUMENTATION. Xilinx reservesthe right, at its sole discretion, to change the DOCUMENTATION without notice at any time. Xilinx assumes no obligation to correct any errorscontained in the DOCUMENTATION, or to advise you of any corrections or updates. Xilinx expressly disclaims any liability in connection withtechnical support or assistance that may be provided to you in connection with the Information.
標簽：
Virtex
FPGA
PCB
設計手冊
上傳時間：
2014-01-13
上傳用戶：竺羽翎2222
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Xilinx is disclosing this user guide, manual, release note, and/or specification (the “DOCUMENTATION”) to you
solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce,
distribute, republish, download, display, post, or transmit the DOCUMENTATION in any form or by any means
including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise, without the prior
written consent of Xilinx. Xilinx expressly disclaims any liability arising out of your use of the DOCUMENTATION.
Xilinx reserves the right, at its sole discretion, to change the DOCUMENTATION without notice at any time. Xilinx
assumes no obligation to correct any errors contained in the DOCUMENTATION, or to advise you of any corrections
or updates. Xilinx expressly disclaims any liability in connection with technical support or assistance that may be
provided to you in connection with the Information.
標簽：
CPLD
上傳時間：
2013-10-22
上傳用戶：李哈哈哈
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The information in this specification is subject to change without notice.Use of this specification for product design requires an executed license agreement from the CompactFlashAssociation.The CompactFlash Association shall not be liable for technical or editorial errors or omissions contained herein; norfor incidental or consequential damages resulting from the furnishing, performance, or use of this material.All parts of the CompactFlash Specification are protected by copyright law and all rights are reserved. ThisDOCUMENTATION may not, in whole or in part, be copied, photocopied, reproduced, translated, or reduced to anyelectronic medium or machine readable form without prior consent, in writing, from the CompactFlash Association.The CFA logo is a trademark of the CompactFlash Association.Product names mentioned herein are for identification purposes only and may be trademarks and/or registeredtrademarks of their respective companies.© 1998-99, CompactFlash Association. All rights reserved.
標簽：
技術資料
上傳時間：
2013-10-08
上傳用戶：stewart·
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Xilinx is disclosing this user guide, manual, release note, and/or specification (the "DOCUMENTATION") to you solely for use in the developmentof designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit theDOCUMENTATION in any form or by any means including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise,without the prior written consent of Xilinx. Xilinx expressly disclaims any liability arising out of your use of the DOCUMENTATION. Xilinx reservesthe right, at its sole discretion, to change the DOCUMENTATION without notice at any time. Xilinx assumes no obligation to correct any errorscontained in the DOCUMENTATION, or to advise you of any corrections or updates. Xilinx expressly disclaims any liability in connection withtechnical support or assistance that may be provided to you in connection with the Information.
標簽：
Virtex
FPGA
PCB
設計手冊
上傳時間：
2013-11-11
上傳用戶：zwei41
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Xilinx is disclosing this user guide, manual, release note, and/or specification (the “DOCUMENTATION”) to you
solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce,
distribute, republish, download, display, post, or transmit the DOCUMENTATION in any form or by any means
including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise, without the prior
written consent of Xilinx. Xilinx expressly disclaims any liability arising out of your use of the DOCUMENTATION.
Xilinx reserves the right, at its sole discretion, to change the DOCUMENTATION without notice at any time. Xilinx
assumes no obligation to correct any errors contained in the DOCUMENTATION, or to advise you of any corrections
or updates. Xilinx expressly disclaims any liability in connection with technical support or assistance that may be
provided to you in connection with the Information.
標簽：
CPLD
上傳時間：
2014-12-05
上傳用戶：qazxsw
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CHM decompiler is a program that converts the internal files of CHM files back into the HHP, HHC, and HHK, etc. used to compile the DOCUMENTATION. CHM decompiler是一個把CHM 文件的內部文件轉換成 HHP, HHC,和HHK等的程序。它用于編譯文件。
標簽：
files
decompiler
CHM
the
上傳時間：
2015-01-10
上傳用戶：myworkpost
