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DUAL-boot

  • 基于MPC8548E的固件設計

    固件作為目標板啟動最核心程序,不僅僅需要引導操作系統,更重要的是需要實現所有硬件的初始化和自檢等,方便設備的維護和保養。U-Boot作為一款通用的開源固件程序,具有良好的可移植性和完整的功能。通過分析U-Boot的目錄結構和啟動流程以及目標板的設計需求,來實現完成基于MPC8548E目標板的具體修改和移植,并增加關鍵硬件的自檢功能,同時闡述通過設置環境變量來啟動操作系統內核。對于不同的CPU和開發板,本U-Boot的啟動原理分析和移植有一定的借鑒意義。

    標簽: 8548E 8548 MPC 固件設計

    上傳時間: 2014-12-30

    上傳用戶:lllliii

  • XAPP996-雙處理器參考設計套件

    This is the Xilinx Dual Processor Reference Designs suite. The designs illustrate a few differentdual-core architectures based on the MicroBlaze™ and PowerPC™ processors. The designsillustrate various concepts described in the Xilinx White Paper WP262 titled, “DesigningMultiprocessor Systems in Platform Studio”. There are simple software applications includedwith the reference designs that show various forms of interaction between the two processors.

    標簽: XAPP 996 雙處理器 參考設計

    上傳時間: 2013-10-29

    上傳用戶:旭521

  • VxWorks6.x中的ML403嵌入式開發平臺

    The use of the Wind River VxWorks Real-Time Operating System (RTOS) on Virtex™-4embedded PowerPC™ processors continues to be a popular choice for high performanceFPGA designs. The introduction of the Wind River Workbench design environment has enableda new and easier way for designers to control the configuration of the VxWorks kernel. Thisguide shows the steps required to build and configure a ML403 Embedded DevelopmentPlatform to boot and run the VxWorks RTOS. A VxWorks bootloader is created, programmedinto Flash, and used to boot the design. The concepts presented here can be scaled to anyPowerPC enabled development platform.

    標簽: VxWorks 403 ML 嵌入式

    上傳時間: 2013-10-26

    上傳用戶:agent

  • linux內核分析

    對于Intel x86 PC , 開啟電源后, 機器就會開始執行ROM BIOS的一系列系統測試動作,包括檢查RAM,keyboard,顯示器,軟硬磁盤等等。執行完bios 的系統測試之后,緊接著控制權會轉移給ROM 中的啟動程序(ROM bootstrap routine);這個程序會將磁盤上的第0軌第0 扇區(叫boot sector 或MBR ,系統的引導程序就放在此處)讀入內存中,并放到自0x07C0:0x0000 開始的512 個字節處.

    標簽: linux 內核分析

    上傳時間: 2014-12-30

    上傳用戶:pei5

  • 數字衛星設備控制兼容的天線供電系統設計

    Abstract: This application note discusses a design for a phantom antenna power-supply system compatible with theDigital Satellite Equipment Control (DiSEqC) communication standard, using the MAX16948 automotive dual, highvoltageLDO/switch. The presented application circuit provides a remote antenna power supply and also enables onewaycommunication from the radio head unit to the remote antenna. This system architecture offers flexibility inDiSEqC tone-burst frequency choice (100Hz to 30kHz), enabling users the ability to select the best frequency for theirapplication.

    標簽: 數字衛星 控制 兼容 供電系統設計

    上傳時間: 2013-11-17

    上傳用戶:fnhhs

  • DN492-雙單片降壓集成溫度監控模塊

      Multioutput monolithic regulators are easy to use and fi tinto spaces where multichip solutions cannot. Nevertheless,the popularity of multioutput regulators is temperedby a lack of options for input voltages above 30V andsupport of high output currents. The LT3692A fi lls thisgap with a dual monolithic regulator that operates frominputs up to 36V. It also includes a number of channeloptimization features that allow the LT3692A’s per-channelperformance to rival that of multichip solutions.

    標簽: 492 DN 降壓 溫度監控

    上傳時間: 2014-01-03

    上傳用戶:Huge_Brother

  • RT9005/RT9005A/RT9005B datasheet pdf

    The RT9005A/B is a dual-output Linear regulator for DDR-SDRAM VDDQ supply and termination voltage VTT supply.

    標簽: 9005 datasheet RT

    上傳時間: 2013-11-13

    上傳用戶:lmq0059

  • MAX338/MAX339的英文數據手冊

      本軟件是關于MAX338, MAX339的英文數據手冊:MAX338, MAX339   8通道/雙4通道、低泄漏、CMOS模擬多路復用器   The MAX338/MAX339 are monolithic, CMOS analog multiplexers (muxes). The 8-channel MAX338 is designed to connect one of eight inputs to a common output by control of a 3-bit binary address. The dual, 4-channel MAX339 is designed to connect one of four inputs to a common output by control of a 2-bit binary address. Both devices can be used as either a mux or a demux. On-resistance is 400Ω max, and the devices conduct current equally well in both directions.   These muxes feature extremely low off leakages (less than 20pA at +25°C), and extremely low on-channel leakages (less than 50pA at +25°C). The new design offers guaranteed low charge injection (1.5pC typ) and electrostatic discharge (ESD) protection greater than 2000V, per method 3015.7. These improved muxes are pin-compatible upgrades for the industry-standard DG508A and DG509A. For similar Maxim devices with lower leakage and charge injection but higher on-resistance, see the MAX328 and MAX329.

    標簽: MAX 338 339 英文

    上傳時間: 2013-11-12

    上傳用戶:18711024007

  • 嵌入式Linux應用開發完全手冊_韋東山

    本書全面介紹了嵌入式Linux 系統開發過程中,從底層系統支持到上層GUI 應用的方方面面,內容涵蓋Linux 操作系統的安裝及相關工具的使用、配置,嵌入式編程所需要的基礎知識(交叉編譯工具的選項設置、Makefile 語法、ARM 匯編指令等),硬件部件的使用及編程(囊括了常見硬件,比如UART、I2C、LCD 等),U-Boot、Linux 內核的分析、配置和移植,根文件系統的構造(包括移植busybox、glibc、制作映象文件等),內核調試技術(比如添加kgdb 補丁、棧回溯等),驅動程序編寫及移植(LED、按鍵、擴展串口、網卡、硬盤、SD 卡、LCD 和USB 等),GUI 系統的移植(包含兩個GUI 系統:基于Qtopia 和基于X),應用程序調試技術。

    標簽: Linux 嵌入式 完全手冊 應用開發

    上傳時間: 2013-12-23

    上傳用戶:life840315

  • 怎樣使用Nios II處理器來構建多處理器系統

    怎樣使用Nios II處理器來構建多處理器系統 Chapter 1. Creating Multiprocessor Nios II Systems Introduction to Nios II Multiprocessor Systems . . . . . . . . . . . . . . 1–1 Benefits of Hierarchical Multiprocessor Systems  . . . . . . . . . . . . . . . 1–2 Nios II Multiprocessor Systems . . . . . . . . . . . . . . . . . . . .  . . . . . . . . . . . . . 1–2 Multiprocessor Tutorial Prerequisites   . . . . . . . . . . .  . . . . . . . . . . . . 1–3 Hardware Designs for Peripheral Sharing   . . . . . . . . . . . .. . . . . . . . 1–3 Autonomous Multiprocessors   . . . . . . . . . . . . . . . . . . . . . .  . . . . . . . 1–3 Multiprocessors that Share Peripherals . . . . . . . . . . . . . . . . . . . . . . 1–4 Sharing Peripherals in a Multiprocessor System   . . . . . . . . . . . . . . . . . 1–4 Sharing Memory  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–6 The Hardware Mutex Core  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . 1–7 Sharing Peripherals   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . 1–8 Overlapping Address Space  . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . 1–8 Software Design Considerations for Multiple Processors . . .. . . . . 1–9 Program Memory  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–9 Boot Addresses  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1–13 Debugging Nios II Multiprocessor Designs  . . . . . . . . . . . . . . . .  1–15 Design Example: The Dining Philosophers’ Problem   . . . . .. . . 1–15 Hardware and Software Requirements . . . . . . . . . . . . . . . .. . . 1–16 Installation Notes  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–17 Creating the Hardware System   . . . . . . . . . . . . . . .. . . . . . 1–17 Getting Started with the multiprocessor_tutorial_start Design Example   1–17 Viewing a Philosopher System   . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . 1–18 Philosopher System Pipeline Bridges  . . . . . . . . . . . . . . . . . . . . . 1–19 Adding Philosopher Subsystems   . . . . . . . . . . . . . . . . . . . . . .  . . . . 1–21 Connecting the Philosopher Subsystems  . . . . . . . . . . . . .. . . . . 1–22 Viewing the Complete System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–27 Generating and Compiling the System   . . . . . . . . . . . . . . . . . .. 1–28

    標簽: Nios 處理器 多處理器

    上傳時間: 2013-11-21

    上傳用戶:lo25643

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