By Tom Christiansen and Nathan Torkington
ISBN 1-56592-243-3
First Edition, published August 1998.
(See the catalog page for this book.)
Search the text of Perl Cookbook.
Table of Contents
Copyright Page
Foreword
Preface
Chapter 1: Strings
Chapter 2: Numbers
Chapter 3: Dates and Times
Chapter 4: Arrays
Chapter 5: Hashes
Chapter 6: Pattern Matching
Chapter 7: File Access
Chapter 8: File Contents
Chapter 9: Directories
Chapter 10: Subroutines
Chapter 11: References and Records
Chapter 12: Packages, Libraries, and Modules
Chapter 13: Classes, Objects, and Ties
Chapter 14: Database Access
Chapter 15: User Interfaces
Chapter 16: Process Management and Communication
Chapter 17: Sockets
Chapter 18: Internet Services
Chapter 19: CGI Programming
Chapter 20: Web Automation
Index
Colophon
Perl & XML.
by Erik T. Ray and Jason McIntosh
ISBN 0-596-00205-X
First Edition, published April 2002.
(See the catalog page for this book.)
Table of Contents
Copyright Page
Preface
Chapter 1: Perl and XML
Chapter 2: An XML Recap
Chapter 3: XML Basics: Reading and Writing
Chapter 4: Event Streams
Chapter 5: SAX
Chapter 6: Tree Processing
Chapter 7: DOM
Chapter 8: Beyond Trees: XPath, XSLT, and More
Chapter 9: RSS, SOAP, and Other XML Applications
Chapter 10: Coding Strategies
Index
Colophon
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tr1 byte "Please input the first 64-bit in hex:first - second",0dh,0ah,0
string byte "remener :use enter to tell high 32-bit from low 32-bit",0dh,0ah,0
examp1 byte "eg: 1234ecdf",0dh,0ah,0
examp2 byte " 03ab2543",0dh,0ah,0
This paper presents several low-latency mixed-timing
FIFO (first-in–first-out) interfaces designs that interface systems
on a chip working at different speeds. The connected systems
can be either synchronous or asynchronous. The designs are then
adapted to work between systems with very long interconnect
delays, by migrating a single-clock solution by Carloni et al.
(1999, 2000, and 2001) (for “latency-insensitive” protocols) to
mixed-timing domains. The new designs can be made arbitrarily
robust with regard to metastability and interface operating speeds.
Initial simulations for both latency and throughput are promising.
