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Design

  • The DSP Design Flow workshop provides

    The DSP Design Flow workshop provides an introduction to the advanced tools you need to Design and implement DSP algorithms targeting FPGAs. This intermediate workshop in implementing DSP functions focuses on learning how to use System Generator for DSP,

    標(biāo)簽: workshop provides Design Flow

    上傳時(shí)間: 2013-09-02

    上傳用戶:joheace

  • Allegro Design guide

    Allegro Design guide \r\nAllegro Design guide

    標(biāo)簽: Allegro Design guide

    上傳時(shí)間: 2013-09-07

    上傳用戶:mnacyf

  • DESCRIPTION: DDS Design BY PLD DEVICES

    * DESCRIPTION: DDS Design BY PLD DEVICES.\r\n *\r\n * AUTHOR: Sun Yu\r\n *\r\n * HISTORY: 12/06/2002 \r\n *

    標(biāo)簽: DESCRIPTION DEVICES Design DDS

    上傳時(shí)間: 2013-09-09

    上傳用戶:jokey075

  • protel99se pcb Design

    protel99se pcb Design

    標(biāo)簽: protel Design pcb 99

    上傳時(shí)間: 2013-09-11

    上傳用戶:dyctj

  • Verilog Coding Style for Efficient Digital Design

      In this paper, we discuss efficient coding and Design styles using verilog. This can beimmensely helpful for any digital Designer initiating Designs. Here, we address different problems rangingfrom RTL-Gate Level simulation mismatch to race conditions in writing behavioral models. All theseproblems are accompanied by an example to have a better idea, and these can be taken care off if thesecoding guidelines are followed. Discussion of all the techniques is beyond the scope of this paper, however,here we try to cover a few of them.

    標(biāo)簽: Efficient Verilog Digital Coding

    上傳時(shí)間: 2013-11-22

    上傳用戶:han_zh

  • Allegro-Design-Editor-Tutorial_ade_tut

    Trademarks: Trademarks and service marks of Cadence Design Systems, Inc. (Cadence) contained in

    標(biāo)簽: Allegro-Design-Editor-Tutorial_ad e_tut

    上傳時(shí)間: 2014-08-09

    上傳用戶:龍飛艇

  • High-Speed Digital System Design

    Introduce High-Speed Digital System Design.

    標(biāo)簽: High-Speed Digital Design System

    上傳時(shí)間: 2013-10-20

    上傳用戶:gps6888

  • 數(shù)字集成電路設(shè)計(jì)Digital Integrated Circuit Design

      This unique guide to Designing digital VLSI circuits takes a top-down approach, reflecting the natureof the Design process in industry. Starting with architecture Design, the book explains the why andhow of digital Design, using the physics that Designers need to know, and no more.Covering system and component aspects, Design verification, VHDL modelling, clocking, signalintegrity, layout, electricaloverstress, field-programmable logic, economic issues, and more, thescope of the book is singularly comprehensive.

    標(biāo)簽: Integrated Digital Circuit Design

    上傳時(shí)間: 2013-11-04

    上傳用戶:life840315

  • Analog Circuit Design in Porta

    •Founded in Jan. 08, 2001 in Shanghai, China.•Fabless IDH focused on Analog & Mixed Signal Chip Design & marketing •Over 100 IC introduced.•Over 200 OEM Customer worldwide•ISO-9000 Certified•Distribution Channel in Taiwan, China & Japan To achieve 100% customer satisfactionby producing the technically advanced product with the best quality, on-time delivery and service. Leverages on proprietary process and world-class engineering team to develop innovative & high quality analog solutions that add value to electronics equipment.

    標(biāo)簽: Circuit Analog Design Porta

    上傳時(shí)間: 2013-10-24

    上傳用戶:songnanhua

  • 模擬cmos集成電路設(shè)計(jì)(Design of analog

    模擬集成電路的設(shè)計(jì)與其說(shuō)是一門(mén)技術(shù),還不如說(shuō)是一門(mén)藝術(shù)。它比數(shù)字集成電路設(shè)計(jì)需要更嚴(yán)格的分析和更豐富的直覺(jué)。嚴(yán)謹(jǐn)堅(jiān)實(shí)的理論無(wú)疑是嚴(yán)格分析能力的基石,而設(shè)計(jì)者的實(shí)踐經(jīng)驗(yàn)無(wú)疑是誕生豐富直覺(jué)的源泉。這也正足初學(xué)者對(duì)學(xué)習(xí)模擬集成電路設(shè)計(jì)感到困惑并難以駕馭的根本原因。.美國(guó)加州大學(xué)洛杉機(jī)分校(UCLA)Razavi教授憑借著他在美國(guó)多所著名大學(xué)執(zhí)教多年的豐富教學(xué)經(jīng)驗(yàn)和在世界知名頂級(jí)公司(AT&T,Bell Lab,HP)卓著的研究經(jīng)歷為我們提供了這本優(yōu)秀的教材。本書(shū)自2000午出版以來(lái)得到了國(guó)內(nèi)外讀者的好評(píng)和青睞,被許多國(guó)際知名大學(xué)選為教科書(shū)。同時(shí),由于原著者在世界知名頂級(jí)公司的豐富研究經(jīng)歷,使本書(shū)也非常適合作為CMOS模擬集成電路設(shè)計(jì)或相關(guān)領(lǐng)域的研究人員和工程技術(shù)人員的參考書(shū)。... 本書(shū)介紹模擬CMOS集成電路的分析與設(shè)計(jì)。從直觀和嚴(yán)密的角度闡述了各種模擬電路的基本原理和概念,同時(shí)還闡述了在SOC中模擬電路設(shè)計(jì)遇到的新問(wèn)題及電路技術(shù)的新發(fā)展。本書(shū)由淺入深,理論與實(shí)際結(jié)合,提供了大量現(xiàn)代工業(yè)中的設(shè)計(jì)實(shí)例。全書(shū)共18章。前10章介紹各種基本模塊和運(yùn)放及其頻率響應(yīng)和噪聲。第11章至第13章介紹帶隙基準(zhǔn)、開(kāi)關(guān)電容電路以及電路的非線性和失配的影響,第14、15章介紹振蕩器和鎖相環(huán)。第16章至18章介紹MOS器件的高階效應(yīng)及其模型、CMOS制造工藝和混合信號(hào)電路的版圖與封裝。 1 Introduction to Analog Design 2 Basic MOS Device Physics 3 Single-Stage Amplifiers 4 Differential Amplifiers 5 Passive and Active Current Mirrors 6 Frequency Response of Amplifiers 7 Noise 8 Feedback 9 Operational Amplifiers 10 Stability and Frequency Compensation 11 Bandgap References 12 Introduction to Switched-Capacitor Circuits 13 Nonlinearity and Mismatch 14 Oscillators 15 Phase-Locked Loops 16 Short-Channel Effects and Device Models 17 CMOS Processing Technology 18 Layout and Packaging

    標(biāo)簽: analog Design cmos of

    上傳時(shí)間: 2014-12-23

    上傳用戶:杜瑩12345

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