it is a verilog code written for DigITal watch in modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device]
標(biāo)簽：
synthesize
simulator
modelsim
DigITal
上傳時間：
2014-01-10
上傳用戶：kernaling
