Verilog Overview
n Basic Structure of a Verilog Model
n Components of a Verilog Module
– Ports
– Data Types
– Assigning Values and Numbers
– Operators
– Behavioral Modeling
• Continuous Assignments
• Procedural Blocks
– Structural Modeling
n Summary: Verilog Environment
標簽：
Verilog
Components
Structure
Overview
上傳時間：
2017-02-18
上傳用戶：xinyuzhiqiwuwu
