ADS電子設(shè)計(jì)自動(dòng)化（EDA軟件全稱(chēng)為 Advanced Design System，是美國(guó)安捷倫（Agilent）公司所生產(chǎn)擁有的電子設(shè)計(jì)自動(dòng)化軟件；ADS功能十分強(qiáng)大，包含時(shí)域電路仿真 (SPICE-like Simulation)、頻域電路仿真 (Harmonic Balance、Linear Analysis)、三維電磁仿真 、通信系統(tǒng)仿真(Communication System Simulation)和數(shù)字信號(hào)處理仿真設(shè)計(jì)（DSP）；支持射頻和系統(tǒng)設(shè)計(jì)工程師開(kāi)發(fā)所有類(lèi)型的 RF設(shè)計(jì)，從離散的射頻/微波模塊到用于通信和航天/國(guó)防的集成MMIC，是當(dāng)今國(guó)內(nèi)各大學(xué)和研究所使用最多的微波/射頻電路和通信系統(tǒng)仿真軟件軟件。
上傳時(shí)間： 2013-07-21
上傳用戶(hù)：eeworm
·/Chris Nagy著/Texas Instruments Incorporated/292頁(yè)/2003年出版
標(biāo)簽： nbsp Embedded Design System
上傳時(shí)間： 2013-05-19
上傳用戶(hù)：zh1296404500
The DSP Design Flow workshop provides an introduction to the advanced tools you need to design and implement DSP algorithms targeting FPGAs. This intermediate workshop in implementing DSP functions focuses on learning how to use System Generator for DSP,
標(biāo)簽： workshop provides Design Flow
上傳時(shí)間： 2013-09-02
上傳用戶(hù)：joheace
本文簡(jiǎn)單討論并總結(jié)了VHDL、Verilog，System verilog 這三中語(yǔ)言的各自特點(diǎn)和區(qū)別As the number of enhancements to variousHardware Description Languages (HDLs) hasincreased over the past year, so too has the complexityof determining which language is best fora particular design. Many designers and organizationsare contemplating whether they shouldswitch from one HDL to another.
標(biāo)簽： Verilog verilog System VHDL
上傳時(shí)間： 2013-10-16
上傳用戶(hù)：牛布牛
This unique guide to designing digital VLSI circuits takes a top-down approach, reflecting the natureof the design process in industry. Starting with architecture design, the book explains the why andhow of digital design, using the physics that designers need to know, and no more.Covering system and component aspects, design verification, VHDL modelling, clocking, signalintegrity, layout, electricaloverstress, field-programmable logic, economic issues, and more, thescope of the book is singularly comprehensive.
標(biāo)簽： Integrated Digital Circuit Design
上傳時(shí)間： 2013-11-04
上傳用戶(hù)：life840315
介紹了MPC555與CS8900A擴(kuò)展以太網(wǎng)的硬件設(shè)計(jì)圖。以NUCLUES PLUS操作系統(tǒng)為基礎(chǔ)，介紹了網(wǎng)卡軟件驅(qū)動(dòng)程序的編制，給出了以太網(wǎng)協(xié)議包嵌入NUCLEUS PLUS操作系統(tǒng)的實(shí)現(xiàn)方法。 Abstract: The Ethernet extension hardware design of MPC555 and CS8900A are introduced,and the software driven program based on NUCLEUS PLUS operation system and the technique that Ethernet protocol embedded in NUCLEUS PLUS real operation system are discussed.
上傳時(shí)間： 2013-10-23
上傳用戶(hù)：xiehao13
The introduction of Spartan-3™ devices has createdmultiple changes in the evolution of embedded controldesigns and pushed processing capabilities to the “almostfreestage.” With these new FPGAs falling under $20, involume, with over 1 million system gates, and under $5for 100K gate-level units, any design with programmablelogic has a readily available 8- or 16-bit processor costingless than 75 cents and 32-bit processor for less than $1.50.
上傳時(shí)間： 2013-12-10
上傳用戶(hù)：zgu489
針對(duì)嵌入式機(jī)器視覺(jué)系統(tǒng)向獨(dú)立化、智能化發(fā)展的要求，介紹了一種嵌入式視覺(jué)系統(tǒng)--智能相機(jī)。基于對(duì)智能相機(jī)體系結(jié)構(gòu)、組成模塊和圖像采集、傳輸和處理技術(shù)的分析，對(duì)國(guó)內(nèi)外的幾款智能相機(jī)進(jìn)行比較。綜合技術(shù)發(fā)展現(xiàn)狀，提出基于FPGA+DSP模式的硬件平臺(tái)，并提出智能相機(jī)的發(fā)展方向。分析結(jié)果表明，該系統(tǒng)設(shè)計(jì)可以實(shí)現(xiàn)脫離PC運(yùn)行，完成圖像獲取與分析，并作出相應(yīng)輸出。 Abstract: This paper introduced an embedded vision system-intelligent camera ，which was for embedded machine vision systems to an independent and intelligent development requirements. Intelligent camera architecture， component modules and image acquisition， transmission and processing technology were analyzed. After comparing integrated technology development of several intelligent cameras at home and abroad， the paper proposed the hardware platform based on FPGA+DSP models and made clear direction of development of intelligent cameras. On the analysis of the design， the results indicate that the system can run from the PC independently to complete the image acquisition and analysis and give a corresponding output.
標(biāo)簽： FPGA DSP 模式 智能相機(jī)
上傳時(shí)間： 2013-10-24
上傳用戶(hù)：bvdragon
多遠(yuǎn)程二極管溫度傳感器-Design Considerations for pc thermal management Multiple RDTS (remote diode temperature sensing) provides the most accurate method of sensing an IC’s junction temperature. It overcomes thermal gradient and placement issues encountered when trying to place external sensors. PCB component count decreases when using a device that provides multiple inputs.Better temperature sensing improves product performance and reliability. Disk drive data integrity suffers at elevated temperatures. IBM published an article stating that a 5°C rise in operating temperature causes a 15% increase in the drive’s failure rate. The overall performance of a system can be improved by providing a more accurate temperature measurement of the most critical devices allowing them to run just a few degrees hotter.The LM83 directly senses its own temperature and the temperature of three external PN junctions. One is dedicated to the CPU of choice, the other two go to other parts of your system that need thermal monitoring such as the disk drive or graphics chip. The SMBus-compatible LM83 supports SMBus timeout and logic levels. The LM83 has two interrupt outputs; one for user-programmable limits and WATCHDOG capability (INT), the other is a Critical Temperature Alarm output (T_CRIT_A) for system power supply shutdown.
標(biāo)簽： Considerat Design 遠(yuǎn)程 二極管
上傳時(shí)間： 2014-12-21
上傳用戶(hù)：ljd123456
The use of the Wind River VxWorks Real-Time Operating System (RTOS) on Virtex™-4embedded PowerPC™ processors continues to be a popular choice for high performanceFPGA designs. The introduction of the Wind River Workbench design environment has enableda new and easier way for designers to control the configuration of the VxWorks kernel. Thisguide shows the steps required to build and configure a ML403 Embedded DevelopmentPlatform to boot and run the VxWorks RTOS. A VxWorks bootloader is created, programmedinto Flash, and used to boot the design. The concepts presented here can be scaled to anyPowerPC enabled development platform.
上傳時(shí)間： 2013-10-26
上傳用戶(hù)：agent
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