6小時(shí)學(xué)會labview,
labview Six Hour Course – Instructor Notes
This zip file contains material designed to give students a working knowledge of labview in a 6 hour timeframe. The contents are:
Instructor Notes.doc – this document.
labviewIntroduction-SixHour.ppt – a PowerPoint presentation containing screenshots and notes on the topics covered by the course.
Convert C to F (Ex1).vi – Exercise 1 solution VI.
Convert C to F (Ex2).vi – Exercise 2 solution subVI.
Thermometer-DAQ (Ex2).vi – Exercise 2 solution VI.
Temperature Monitor (Ex3).vi – Exercise 3 solution VI.
Thermometer (Ex4).vi – Exercise 4 solution subVI.
Convert C to F (Ex4).vi – Exercise 4 solution subVI.
Temperature Logger (Ex4).vi – Exercise 4 solution VI.
Multiplot Graph (Ex5).vi – Exercise 5 solution VI.
Square Root (Ex6).vi – Exercise 6 solution VI.
State Machine 1 (Ex7).vi – Exercise 7 solution VI.
The slides can be presented in two three hour labs, or six one hour lectures. Depending on the time and resources available in class, you can choose whether to assign the Exercises as homework or to be done in class. If you decide to assign the Exercises in class, it is best to assign them in order with the presentation. This way the students can create VI’s while the relevant information is still fresh. The notes associated with the exercise slide should be sufficient to guide the students to a solution. The solution files included are one possible solution, but by no means the only solution.
The DSP Design Flow workshop provides an introduction to the advanced tools you need to design and implement DSP algorithms targeting FPGAs. This intermediate workshop in implementing DSP functions focuses on learning how to use System Generator for DSP, as well as HDL design flow, CORE Generator software, and design implementation tools. Through hands-on Exercises, you will implement a design from algorithm concept to verification.
The purpose of this lab is to introduce the concept of FSMs with a datapath, and to
study the usage of more complex test benches. Also, we enforce a rudimentary design
methodology by assuming that the students are part of a bigger project, and have no
knowledge of VHDL-implementation of the datapath (made by a hypothetical other
group) other than its predefined Entity Interface until they come to the lab.
The rest of this document is structured as follows: Section 2 describes some prelimi-
nary reading and Exercises that should be done before the lab. Section 3 details the
design tasks that should be carried out to pass this lab.
This program illustrates how to erase, write, and read FLASH memory from
application code written in C . This routine Exercises the upper 128-
byte FLASH sector.
A detailed explanation of C# 2.0
An introduction to Visual Studio 2005, a tool set for building Windows and web applications
More than 200 questions and programming Exercises to help you better judge your understanding of the material
A greater emphasis on event handling
Information on generics and generic collections
