The standard that governs the design of avioniccomponents and systems, DO-254, is one of the mostpoorly understood but widely applicable standardsin the avionic industry. While information on thegeneral aspects of the standard is easy to obtain, thedetails of exactly how to implement the standard aresketchy. And once an entity develops a process thatachieves compliance, the details of how compliancewas achieved become part of the intellectualproperty of that entity. This white paper FOCUSes onthe details of developing a DO-254 compliantprocess for the design of FPGAs.
上傳時間： 2013-11-12
上傳用戶：q123321
This application note covers the design considerations of a system using the performance features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The design FOCUSes on high system throughput through the AXI Interconnect core with F MAX and area optimizations in certain portions of the design. The design uses five AXI video direct memory access (VDMA) engines to simultaneously move 10 streams (five transmit video streams and five receive video streams), each in 1920 x 1080p format, 60 Hz refresh rate, and up to 32 data bits per pixel. Each VDMA is driven from a video test pattern generator (TPG) with a video timing controller (VTC) block to set up the necessary video timing signals. Data read by each AXI VDMA is sent to a common on-screen display (OSD) core capable of multiplexing or overlaying multiple video streams to a single output video stream. The output of the OSD core drives the DVI video display interface on the board. Performance monitor blocks are added to capture performance data. All 10 video streams moved by the AXI VDMA blocks are buffered through a shared DDR3 SDRAM memory and are controlled by a MicroBlaze™ processor. The reference system is targeted for the Virtex-6 XC6VLX240TFF1156-1 FPGA on the Xilinx® ML605 Rev D evaluation board
標(biāo)簽： XAPP 740 AXI 互聯(lián)
上傳時間： 2013-11-14
上傳用戶：fdmpy
This document is a quick reference to some of the formulas and important information related to optical technologies. It FOCUSes on decibels (dB), decibels per milliwatt (dBm), attenuation and measurements, and provides an introduction to optical fibers.
上傳時間： 2013-10-17
上傳用戶：libenshu01
闡述了軌道交通列車定位技術(shù)。介紹了在軌道交通系統(tǒng)中列車定位技術(shù)的功能，國內(nèi)外軌道交通中主要采用的列車定位方法，重點論述了幾種主要定位技術(shù)，并從定位精度、閉塞制式、維護投資成本、抗干擾等方面進行分析比較。提出目前軌道交通定位技術(shù)應(yīng)綜合運用，取長補短，多種方法相互融合，才能滿足軌道交通中對安全可靠性的要求。 Abstract: Rail train positioning technology is described. The paper introduces the funetions of the train positioning technology in the rail transit system， the main methods of train positioning do mestic and international rail， and FOCUSes on several key methods， analyzes and compares from the positioning accuracy， block system, maintenance and investment cost， interference and so on， suggested that the current rail positioning technology should be integrated use of positioning method of meriging， learn from each other， to meet the reliability requirements of rail safety.
上傳時間： 2013-11-25
上傳用戶：franktu
The standard that governs the design of avioniccomponents and systems, DO-254, is one of the mostpoorly understood but widely applicable standardsin the avionic industry. While information on thegeneral aspects of the standard is easy to obtain, thedetails of exactly how to implement the standard aresketchy. And once an entity develops a process thatachieves compliance, the details of how compliancewas achieved become part of the intellectualproperty of that entity. This white paper FOCUSes onthe details of developing a DO-254 compliantprocess for the design of FPGAs.
上傳時間： 2013-11-03
上傳用戶：ysystc670
This application note covers the design considerations of a system using the performance features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The design FOCUSes on high system throughput through the AXI Interconnect core with F MAX and area optimizations in certain portions of the design. The design uses five AXI video direct memory access (VDMA) engines to simultaneously move 10 streams (five transmit video streams and five receive video streams), each in 1920 x 1080p format, 60 Hz refresh rate, and up to 32 data bits per pixel. Each VDMA is driven from a video test pattern generator (TPG) with a video timing controller (VTC) block to set up the necessary video timing signals. Data read by each AXI VDMA is sent to a common on-screen display (OSD) core capable of multiplexing or overlaying multiple video streams to a single output video stream. The output of the OSD core drives the DVI video display interface on the board. Performance monitor blocks are added to capture performance data. All 10 video streams moved by the AXI VDMA blocks are buffered through a shared DDR3 SDRAM memory and are controlled by a MicroBlaze™ processor. The reference system is targeted for the Virtex-6 XC6VLX240TFF1156-1 FPGA on the Xilinx® ML605 Rev D evaluation board
標(biāo)簽： XAPP 740 AXI 互聯(lián)
上傳時間： 2013-11-23
上傳用戶：shen_dafa
The DSP Design Flow workshop provides an introduction to the advanced tools you need to design and implement DSP algorithms targeting FPGAs. This intermediate workshop in implementing DSP functions FOCUSes on learning how to use System Generator for DSP, as well as HDL design flow, CORE Generator software, and design implementation tools. Through hands-on exercises, you will implement a design from algorithm concept to verification.
標(biāo)簽： introduction workshop provides advanced
上傳時間： 2014-12-06
上傳用戶：sammi
Programming C#, the top selling book on Microsoft s high-performance C# programming language, is now in its fourth edition. Aimed at experienced programmers and web developers, this comprehensive guide FOCUSes on the features and programming patterns that are new to C#, and fundamental to the programming of web services and web applications on Microsoft s .NET platform.
標(biāo)簽： high-performance Programming programming Microsoft
上傳時間： 2015-07-21
上傳用戶：l254587896
This thorough, hands-on reference for database developers and administrators delivers expert guidance on sophisticated uses of Transact-SQL (T-SQL)¡ ª one of the most familiar and powerful programming languages for SQL Server. Written by a T-SQL guru, this guide FOCUSes on language features and how they are interpreted and processed by the SQL Server execution engine. You¡ ¯ ll get in-depth coverage of the sophisticated uses of T-SQL, including triggers, user-defined functions, exception handling, and more. The book explains and compares solutions to database-development problems in both SQL Server 2000 and SQL Server 2005, discussing the new T-SQL programming features added to SQL Server 2005 in detail. Includes extensive code samples, table examples, and logic puzzles to help database developers and administrators understand the intricacies and help promote mastery of T-SQL.
標(biāo)簽： administrators developers reference thorough
上傳時間： 2013-12-29
上傳用戶：Avoid98
With the release of PHP 5 web developers need a guide to developing with PHP 5 to both learn its complex new features and more fully implement the long-standing features on which PHP s success is built. PHP 5 in Practice is a reference guide that provides developers with easy-to-use and easily extensible code to solve common PHP problems. It FOCUSes on providing real code solutions to problems, allowing the reader to learn by seeing exactly what is happening behind the scenes to get your solution. Because a real-life situation will rarely match the book s example problems precisely, PHP 5 in Practice explains the solution well enough that you will understand it and can learn how to truly solve your own problem.
標(biāo)簽： developers developing PHP release
上傳時間： 2013-12-17
上傳用戶：xzt
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