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Form-Factor

  • PICMG_COM_0_R2_0COMe規(guī)范--原文資料

    A Computer-On-Module, or COM, is a Module with all components necessary for a bootable host computer, packaged as a super component. A COM requires a Carrier Board to bring out I/O and to power up. COMs are used to build single board computer solutions and offer OEMs fast time-to-market with reduced development cost. Like integrated circuits, they provide OEMs with significant freedom in meeting form-fit-function requirements. For all these reasons the COM methodology has gained much popularity with OEMs in the embedded industry. COM Express® is an open industry standard for Computer-On-Modules. It is designed to be future proof and to provide a smooth transition path from legacy parallel interfaces to LVDS (Low Voltage Differential Signaling) interfaces. These include the PCI bus and parallel ATA on the one hand and PCI Express and Serial ATA on the other hand.

    標(biāo)簽: PICMG_COM COMe

    上傳時(shí)間: 2013-11-05

    上傳用戶:Wwill

  • ZigBee無線傳感網(wǎng)絡(luò)的路由協(xié)議研究

     為滿足無線網(wǎng)絡(luò)技術(shù)具有低功耗、節(jié)點(diǎn)體積小、網(wǎng)絡(luò)容量大、網(wǎng)絡(luò)傳輸可靠等技術(shù)要求,設(shè)計(jì)了一種以MSP430單片機(jī)和CC2420射頻收發(fā)器組成的無線傳感節(jié)點(diǎn)。通過分析其節(jié)點(diǎn)組成,提出了ZigBee技術(shù)中的幾種網(wǎng)絡(luò)拓?fù)湫问剑⒀芯苛薢igBee路由算法。針對(duì)不同的傳輸要求形式選用不同的網(wǎng)絡(luò)拓?fù)湫问娇梢员M大可能地減少系統(tǒng)成本。同時(shí)針對(duì)不同網(wǎng)絡(luò)選用正確的ZigBee路由算法有效地減少了網(wǎng)絡(luò)能量消耗,提高了系統(tǒng)的可靠性。應(yīng)用試驗(yàn)表明,采用ZigBee方式通信可以提高傳輸速率且覆蓋范圍大,與傳統(tǒng)的有線通信方式相比可以節(jié)約40%左右的成本。 Abstract:  To improve the proposed technical requirements such as low-ower, small nodes, large capacity and reliable network transmission, wireless sensor nodes based on MSP430 MCU and CC2420 RF transceiver were designed. This paper provided network topology of ZigBee technology by analysing the component of the nodes and researched ZigBee routing algorithm. Aiming at different requirements of transmission mode to choose the different network topologies form can most likely reduce the system cost. And aiming at different network to choose the correct ZigBee routing algorithm can effectively reduced the network energy consumption and improved the reliability of the system. Results show that the communication which used ZigBee mode can improve the transmission rate, cover more area and reduce 40% cost compared with traditional wired communications mode.

    標(biāo)簽: ZigBee 無線傳感網(wǎng)絡(luò) 協(xié)議研究 路由

    上傳時(shí)間: 2013-10-09

    上傳用戶:robter

  • CF卡技術(shù)資料

    The information in this specification is subject to change without notice.Use of this specification for product design requires an executed license agreement from the CompactFlashAssociation.The CompactFlash Association shall not be liable for technical or editorial errors or omissions contained herein; norfor incidental or consequential damages resulting from the furnishing, performance, or use of this material.All parts of the CompactFlash Specification are protected by copyright law and all rights are reserved. Thisdocumentation may not, in whole or in part, be copied, photocopied, reproduced, translated, or reduced to anyelectronic medium or machine readable form without prior consent, in writing, from the CompactFlash Association.The CFA logo is a trademark of the CompactFlash Association.Product names mentioned herein are for identification purposes only and may be trademarks and/or registeredtrademarks of their respective companies.© 1998-99, CompactFlash Association. All rights reserved.

    標(biāo)簽: 技術(shù)資料

    上傳時(shí)間: 2013-10-08

    上傳用戶:stewart·

  • Virtex-6 FPGA PCB設(shè)計(jì)手冊(cè)

    Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the developmentof designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit theDocumentation in any form or by any means including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise,without the prior written consent of Xilinx. Xilinx expressly disclaims any liability arising out of your use of the Documentation. Xilinx reservesthe right, at its sole discretion, to change the Documentation without notice at any time. Xilinx assumes no obligation to correct any errorscontained in the Documentation, or to advise you of any corrections or updates. Xilinx expressly disclaims any liability in connection withtechnical support or assistance that may be provided to you in connection with the Information.

    標(biāo)簽: Virtex FPGA PCB 設(shè)計(jì)手冊(cè)

    上傳時(shí)間: 2013-11-11

    上傳用戶:zwei41

  • CPLD庫指南

    Xilinx is disclosing this user guide, manual, release note, and/or specification (the “Documentation”) to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the Documentation in any form or by any means including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise, without the prior written consent of Xilinx. Xilinx expressly disclaims any liability arising out of your use of the Documentation. Xilinx reserves the right, at its sole discretion, to change the Documentation without notice at any time. Xilinx assumes no obligation to correct any errors contained in the Documentation, or to advise you of any corrections or updates. Xilinx expressly disclaims any liability in connection with technical support or assistance that may be provided to you in connection with the Information.  

    標(biāo)簽: CPLD

    上傳時(shí)間: 2014-12-05

    上傳用戶:qazxsw

  • SM320 PCB LAYOUT GUIDELINES

    Silicon Motion, Inc. has made best efforts to ensure that the information contained in this document is accurate andreliable. However, the information is subject to change without notice. No responsibility is assumed by SiliconMotion, Inc. for the use of this information, nor for infringements of patents or other rights of third parties.Copyright NoticeCopyright 2002, Silicon Motion, Inc. All rights reserved. No part of this publication may be reproduced, photocopied,or transmitted in any form, without the prior written consent of Silicon Motion, Inc. Silicon Motion, Inc. reserves theright to make changes to the product specification without reservation and without notice to our users

    標(biāo)簽: GUIDELINES LAYOUT 320 PCB

    上傳時(shí)間: 2013-10-10

    上傳用戶:manga135

  • 微電腦型單相交流集合式電表(單相二線系統(tǒng))

    微電腦型單相交流集合式電表(單相二線系統(tǒng)) 特點(diǎn): 精確度0.25%滿刻度±1位數(shù) 可同時(shí)量測(cè)與顯示交流電壓,電流,頻率,瓦特,(功率因數(shù)/視在功率) 交流電壓,電流,瓦特皆為真正有效值(TRMS) 交流電流,瓦特之小數(shù)點(diǎn)可任意設(shè)定 瓦特單位W或KW可任意設(shè)定 CT比可任意設(shè)定(1至999) 輸入與輸出絕緣耐壓 2仟伏特/1分鐘( 突波測(cè)試強(qiáng)度4仟伏特(1.2x50us) 數(shù)位RS-485界面 (Optional) 主要規(guī)格: 精確度: 0.1% F.S.±1 digit (Frequency) 0.25% F.S.±1 digit(ACA,ACV,Watt,VA) 0.25% F.S. ±0.25o(Power Factor) (-.300~+.300) 輸入負(fù)載: <0.2VA (Voltage) <0.2VA (Current) 最大過載能力: Current related input: 3 x rated continuous 10 x rated 30 sec. 25 x rated 3sec. 50 x rated 1sec. Voltage related input: maximum 2 x rated continuous 過載顯示: "doFL" 顯示值范圍: 0~600.0V(Voltage) 0~999.9Hz(Frequency)(<20% for voltage input) 0~19999 digit adjustable(Current,Watt,VA) 取樣時(shí)間: 2 cycles/sec. RS-485通訊位址: "01"-"FF" RS-485傳輸速度: 19200/9600/4800/2400 selective RS-485通信協(xié)議: Modbus RTU mode 溫度系數(shù): 100ppm/℃ (0-50℃) 顯示幕: Red high efficiency LEDs high 10.16 mm(0.4") 參數(shù)設(shè)定方式: Touch switches 記憶型式: Non-volatile E²PROM memory 絕緣抗阻: >100Mohm with 500V DC 絕緣耐壓能力: 2KVac/1 min. (input/output/power) 1600 Vdc (input/output) 突波測(cè)試: ANSI c37.90a/1974,DIN-IEC 255-4 impulse voltage 4KV(1.2x50us) 使用環(huán)境條件: 0-50℃(20 to 90% RH non-condensed) 存放環(huán)境條件: 0-70℃(20 to 90% RH non-condensed) CE認(rèn)證: EN 55022:1998/A1:2000 Class A EN 61000-3-2:2000 EN 61000-3-3:1995/A1:2001 EN 55024:1998/A1:2001

    標(biāo)簽: 微電腦 單相交流 單相 電表

    上傳時(shí)間: 2015-01-03

    上傳用戶:幾何公差

  • 低噪聲電壓基準(zhǔn)的噪聲測(cè)量

      Frequently, voltage reference stability and noise defi nemeasurement limits in instrumentation systems. In particular,reference noise often sets stable resolution limits.Reference voltages have decreased with the continuingdrop in system power supply voltages, making referencenoise increasingly important. The compressed signalprocessing range mandates a commensurate reductionin reference noise to maintain resolution. Noise ultimatelytranslates into quantization uncertainty in A to D converters,introducing jitter in applications such as scales, inertialnavigation systems, infrared thermography, DVMs andmedical imaging apparatus. A new low voltage reference,the LTC6655, has only 0.3ppm (775nV) noise at 2.5VOUT.Figure 1 lists salient specifi cations in tabular form. Accuracyand temperature coeffi cient are characteristic ofhigh grade, low voltage references. 0.1Hz to 10Hz noise,particularly noteworthy, is unequalled by any low voltageelectronic reference.

    標(biāo)簽: 低噪聲 電壓基準(zhǔn) 噪聲測(cè)量

    上傳時(shí)間: 2013-10-30

    上傳用戶:wxhwjf

  • 基于MASON公式的多功能二階通用濾波器設(shè)計(jì)

    基于通用集成運(yùn)算放大器,利用MASON公式設(shè)計(jì)了一個(gè)多功能二階通用濾波器,能同時(shí)或分別實(shí)現(xiàn)低通、高通和帶通濾波,也能設(shè)計(jì)成一個(gè)正交振蕩器。電路的極點(diǎn)頻率和品質(zhì)因數(shù)能夠獨(dú)立、精確地調(diào)節(jié)。電路使用4個(gè)集成運(yùn)放、2個(gè)電容和11個(gè)電阻,所有集成運(yùn)放的反相端虛地。利用計(jì)算機(jī)仿真電路的通用濾波功能、極點(diǎn)頻率和品質(zhì)因數(shù)的獨(dú)立控制和正交正弦振蕩,從而證明該濾波器正確有效。 Abstract:  A new multifunctional second-order filter based on OPs was presented by MASON formula. Functions, such as high-pass, band-pass, low-pass filtering, can be realized respectively and simultaneously, and can become a quadrature oscillator by modifying resistance ratio. Its pole angular frequency and quality factor can be tuned accurately and independently. The circuit presented contains four OPs, two capacitors, and eleven resistances, and inverting input of all OPs is virtual ground. Its general filtering, the independent control of pole frequency and quality factor and quadrature sinusoidal oscillation were simulated by computer, and the result shows that the presented circuit is valid and effective.

    標(biāo)簽: MASON 多功能 二階 濾波器設(shè)計(jì)

    上傳時(shí)間: 2013-10-09

    上傳用戶:13788529953

  • The enclosed VB project includes a VB class that implements the Rijndael AES block encryption algori

    The enclosed VB project includes a VB class that implements the Rijndael AES block encryption algorithm. The form in the project runs some test data through the class.

    標(biāo)簽: implements encryption Rijndael enclosed

    上傳時(shí)間: 2015-01-30

    上傳用戶:JIUSHICHEN

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