SL811開發資料_包含源程序_電路圖_芯片資料:SL811HS Embedded USB Host/Slave Controller.The SL811HS is an Embedded USB Host/Slave Controller capable of communicate with either Full-Speed or low-speed USB peripherals. The SL811HS can interface to devices such as microprocessors, microcontrollers, DSPs, or directly to a variety of buses such as ISA, PCMCIA, and others. The SL811HS USB Host Controller conforms to USB Specification 1.1.The SL811HS USB Host/Slave Controller incorporates USB Serial Interface functionality along with internal full-/low-speed transceivers.The SL811HS supports and operates in USB Full-Speed mode at 12 Mbps, or at low-speed 1.5-Mbps mode.The SL811HS data port and microprocessor interface provide an 8-bit data path I/O or DMA bidirectional, with interrupt support to allow easy interface to standard microprocessors or microcontrollers such as Motorola or Intel CPUs and many others. Internally,the SL811HS contains a 256-byte RAM data buffer which is used for control registers and data buffer.The available package types offered are a 28-pin PLCC (SL811HS) and a 48-pin TQFP package (SL811HST-AC). Both packages operate at 3.3 VDC. The I/O interface logic is 5V-tolerant.
上傳時間： 2013-12-22
上傳用戶：a82531317
very comprehensive example, windows WDM driver development ex The use of drive technology can s Say all ?� � e full speed equipm STM32 DAC DMA TIXINGBO Implement hiding process, make pr dma ddk driver
標簽： comprehensive development technology example
上傳時間： 2013-12-22
上傳用戶：蟲蟲蟲蟲蟲蟲
very comprehensive example, windows WDM driver development ex The use of drive technology can s Say all � � e full speed equipm STM32 DAC DMA TIXINGBO Implement hiding process, make pr dma ddk driver
標簽： comprehensive development technology example
上傳時間： 2013-12-14
上傳用戶：alan-ee
High volume USB 2.0 devices will be designed using ASIC technology with embedded USB 2.0 support. For Full-Speed USB devices the operating frequency was low enough to allow data recovery to be handled in a vendors VHDL code, with the ASIC vendor providing only a simple level translator to meet the USB signaling requirements. Today s gate arrays operate comfortably between 30 and 60 MHz. With USB 2.0 signaling running at hundreds of MHz, the existing design methodology must change.
標簽： technology 2.0 USB designed
上傳時間： 2014-01-02
上傳用戶：二驅蚊器
High volume USB 2.0 devices will be designed using ASIC technology with embedded USB 2.0 support. For Full-Speed USB devices the operating frequency was low enough to allow data recovery to be handled in a vendors VHDL code, with the ASIC vendor providing only a simple level translator to meet the USB signaling requirements. Today s gate arrays operate comfortably between 30 and 60 MHz. With USB 2.0 signaling running at hundreds of MHz, the existing design methodology must change.
標簽： technology 2.0 USB designed
上傳時間： 2017-07-05
上傳用戶：zhoujunzhen
AP3852 是一款擁有 CPU 和 DSP 雙核的智能音頻/語音處理芯片。芯片內置有 32 位 CPU 和 32 位 DSP 以及 2M FLASH，配合豐富的外圍控制接口，非常適合各 種智能音頻/語音處理系統。 該芯片配合菁音科技各種專利音頻處理算法，能處理從聲音輸入、噪聲消除、 音頻預補償、音效處理到聲音回放的一個完整的音頻通路；僅需配備簡單的外圍 器件即可組成高品質的音頻輸入/回放系統。能極大的提升產品的性能。 芯片內置 32Bits CPU，擁有良好的開發環境；內置 32Bits 音效處理 DSP，支 持浮點數運算、支持 FFT，方便各種進行各種算法編寫；此外，為增加運算能力， 芯片還內置有一塊專用的 Hardware Engine 單元，特別適合高速 FIR/IIR 運算。 芯片內置24Bits的Audio Codec，具有較高的SNR、THD。內置112KBytesSRAM； 內置 32 位 OTP Key，支持用戶程序加密。 具有豐富的外圍接口，包括 Full Speed USB Device、10Bits SAR ADC、SPI、I2C、 I2S、UART、GPIO 等。
上傳時間： 2022-07-07
上傳用戶：
Universal Serial Bus Implementers Forum Full and Low Speed Electrical and Interoperability Compliance Test Procedure
標簽： Interoperability Implementers Electrical Universal
上傳時間： 2015-11-18
上傳用戶：cc1915
The XC226x derivatives are high-performance members of the Infineon XC2000 Family of full-feature single-chip CMOS microcontrollers. These devices extend the functionality and performance of the C166 Family in terms of instructions (MAC unit), peripherals, and speed. They combine high CPU performance (up to 80 million instructions per second) with extended peripheral functionality and enhanced IO capabilities. Optimized peripherals can be adapted flexibly to meet the application requirements. These derivatives utilize clock generation via PLL and internal or external clock sources. Onchip memory modules include program Flash, program RAM, and data RAM.
標簽： high-performance full-feature derivatives Infineon
上傳時間： 2016-12-12
上傳用戶：wab1981
Introduce High-Speed Digital System Design.
標簽： High-Speed Digital Design System
上傳時間： 2013-10-20
上傳用戶：gps6888
The TJA1042 is a high-speed CAN transceiver that provides an interface between aController Area Network (CAN) protocol controller and the physical two-wire CAN bus.The transceiver is designed for high-speed (up to 1 Mbit/s) CAN applications in theautomotive industry, providing the differential transmit and receive capability to (amicrocontroller with) a CAN protocol controller.
標簽： High-speed transce 1042 TJA
上傳時間： 2014-12-28
上傳用戶：氣溫達上千萬的
