USB On-The-Go Full Speed Host and High Speed Peripheral Controller
標(biāo)簽： Speed Controller Peripheral On-The-Go
上傳時(shí)間： 2014-11-27
上傳用戶：1427796291
The SL11RIDE is a low cost, high speed Universal Serial Bus RISC based Controller board. It contains a 16-bit RISC processor with built in SL11RIDE ROM to greatly reduce firmware development efforts. Its serial flash EEPROM interface offers low cost storage for USB device configuration and customer product specific functions. New functions can be programmed into the I2C by downloading it from a USB Host PC. This unique architecture provides the ability to upgrade products, in the field, without changing the peripheral hardware.
標(biāo)簽： Controller Universal contains Serial
上傳時(shí)間： 2014-01-06
上傳用戶：15071087253
Top 10 things about optimizing Sql Server Performance
標(biāo)簽： Performance optimizing Server things
上傳時(shí)間： 2017-06-19
上傳用戶：xiaohuanhuan
VLSI implementation of high speed and high resolution FFT algorithm based on Radix 2 for DSP application
標(biāo)簽： high implementation resolution algorithm
上傳時(shí)間： 2013-12-26
上傳用戶：yuchunhai1990
bubble sort quick sort selection sort developed to measure time performance of each sorting and compare their results with each other for very large data set 2
標(biāo)簽： sort performance developed selection
上傳時(shí)間： 2014-01-08
上傳用戶：xuan‘nian
for high precision wind energy conversion sysytems this fuzzy controller can be used
標(biāo)簽： conversion controller precision sysytems
上傳時(shí)間： 2014-07-02
上傳用戶：WMC_geophy
artificial inteligence system to determine high angular frequency in matlab
標(biāo)簽： inteligence artificial determine frequency
上傳時(shí)間： 2017-07-05
上傳用戶：youmo81
High volume USB 2.0 devices will be designed using ASIC technology with embedded USB 2.0 support. For full-speed USB devices the operating frequency was low enough to allow data recovery to be handled in a vendors VHDL code, with the ASIC vendor providing only a simple level translator to meet the USB signaling requirements. Today s gate arrays operate comfortably between 30 and 60 MHz. With USB 2.0 signaling running at hundreds of MHz, the existing design methodology must change.
標(biāo)簽： technology 2.0 USB designed
上傳時(shí)間： 2014-01-02
上傳用戶：二驅(qū)蚊器
High volume USB 2.0 devices will be designed using ASIC technology with embedded USB 2.0 support. For full-speed USB devices the operating frequency was low enough to allow data recovery to be handled in a vendors VHDL code, with the ASIC vendor providing only a simple level translator to meet the USB signaling requirements. Today s gate arrays operate comfortably between 30 and 60 MHz. With USB 2.0 signaling running at hundreds of MHz, the existing design methodology must change.
標(biāo)簽： technology 2.0 USB designed
上傳時(shí)間： 2017-07-05
上傳用戶：zhoujunzhen
this book can help you to get a better performance in the gps development
標(biāo)簽： development performance better this
上傳時(shí)間： 2014-12-02
上傳用戶：erkuizhang
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