The PCA9549 provides eight bits of high speed TTL-compatible bus switching controlledby the I2C-bus. The low ON-state resistance of the switch allows connections to be madewith minimal propagation delay. Any individual A to B channel or combination of channelscan be selected via the I2C-bus, determined by the contents of the programmable Controlregister. When the I2C-bus bit is HIGH (logic 1), the switch is on and data can flow fromPort A to Port B, or vice versa. When the I2C-bus bit is LOW (logic 0), the switch is open,creating a high-impedance state between the two ports, which stops the data flow.An active LOW reset input (RESET) allows the PCA9549 to recover from a situationwhere the I2C-bus is stuck in a LOW state. Pulling the RESET pin LOW resets the I2C-busstate machine and causes all the bits to be open, as does the internal power-on resetfunction.
上傳時間: 2014-11-22
上傳用戶:xcy122677
All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.For input signals, which do not provide the required rise/fall times, external circuitry mustbe used to shape the signal transitions.In the attached diagram, the effect of the sample rate is shown. The numbers 1 to 5 in thediagram represent possible sample points. Waveform a) shows the result if the inputsignal transition time through the undefined TTL-level area is less than the time distancebetween the sample points (sampling at 1, 2, 3, and 4). Waveform b) can be the result ifthe sampling is performed more than once within the undefined area (sampling at 1, 2, 5,3, and 4).Sample points:1. Evaluation of the signal clearly results in a low level2. Either a low or a high level can be sampled here. If low is sampled, no transition willbe detected. If the sample results in a high level, a transition is detected, and anappropriate action (e.g. capture) might take place.3. Evaluation here clearly results in a high level. If the previous sample 2) had alreadydetected a high, there is no change. If the previous sample 2) showed a low, atransition from low to high is detected now.
上傳時間: 2013-10-23
上傳用戶:copu
摘 要:用一種新的思路和方法,先計算低通、再計算高通濾波器的有關參數,然后組合成帶通濾波器.關鍵詞:濾波器;參數;新思路中圖分類號: TN713. 5 文獻識別碼:B 文章編號:1008 - 1666 (1999) 04 - 0089 - 03A New Consideration of the Band Filter’s CalculationGuo Wencheng( S hao Yang B usiness and Technology school , S haoyang , Hunan ,422000 )Abstract :This essay deals with a new method of calculating the band filters - first calculatingthe relevant parameters of low - pass filters ,then calculating the ones of high - pass filters.Key words :filter ; parameters ;new considercation八十年代后,信息產業得到了迅猛發展. 帶通濾波器在微波通信、廣播電視和精密儀器設備中得到了廣泛應用. 帶通濾波器性能的優劣,對提高接收機信噪比,防止鄰近信道干擾,提高設備的技術指標,有著十分重要的意義.我在長期的教學實踐中,用切比雪夫型方法設計、計算出寬帶濾波器集中參數元件的數據. 該濾波器可運用在檢測微波頻率的儀器和其他設備中. 再將其思路和計算方法介紹給大家,供參考.
上傳時間: 2014-12-28
上傳用戶:Yukiseop
The RT9018A/B is a high performance positive voltage regulator designed for use in applications requining very low Input voltage and very low dropout voltage at up to 3A(peak).
上傳時間: 2013-10-10
上傳用戶:geshaowei
int trace (int i, int j, int low, IMAGE im,IMAGE mag, IMAGE ori) float gauss(float x, float sigma) float dGauss (float x, float sigma) float meanGauss (float x, float sigma) void hysteresis (int high, int low, IMAGE im, IMAGE mag, IMAGE oriim) void canny (float s, IMAGE im, IMAGE mag, IMAGE ori)
上傳時間: 2015-01-30
上傳用戶:杜瑩12345
SR-tree is an index structure for high-dimensional nearest neighbor queries,C++ sourcecode. SR-tree outperforms the R*-tree and the SS-tree especially for high-dimensional and non-uniform data which are likely to appear in the actual image / video applications.
標簽: high-dimensional structure neighbor SR-tree
上傳時間: 2013-12-10
上傳用戶:zjf3110
Wavelets have widely been used in many signal and image processing applications. In this paper, a new serial-parallel architecture for wavelet-based image compression is introduced. It is based on a 4-tap wavelet transform, which is realised using some FIFO memory modules implementing a pixel-level pipeline architecture to compress and decompress images. The real filter calculation over 4 · 4 window blocks is done using a tree of carry save adders to ensure the high speed processing required for many applications. The details of implementing both compressor and decompressor sub-systems are given. The primarily analysis reveals that the proposed architecture, implemented using current VLSI technologies, can process a video stream in real time.
標簽: applications processing Wavelets widely
上傳時間: 2014-01-22
上傳用戶:hongmo
A general technique for the recovery of signicant image features is presented. The technique is based on the mean shift algorithm, a simple nonparametric pro- cedure for estimating density gradients. Drawbacks of the current methods (including robust clustering) are avoided. Feature space of any nature can be processed, and as an example, color image segmentation is dis- cussed. The segmentation is completely autonomous, only its class is chosen by the user. Thus, the same program can produce a high quality edge image, or pro- vide, by extracting all the signicant colors, a prepro- cessor for content-based query systems. A 512 512 color image is analyzed in less than 10 seconds on a standard workstation. Gray level images are handled as color images having only the lightness coordinate
標簽: technique presented features recovery
上傳時間: 2015-10-14
上傳用戶:410805624
16 relay output channels and 16 isolated digital input channels LED indicators to show activated relays Jumper selectable Form A/Form B-type relay output channel Output status read-back Keep relay output values when hot system reset High-voltage isolation on input channels(2,500 VDC) Hi ESD protection(2,00VDC) High over-voltage protection(70VDC) Wide input range(10~50VDC) Interrupt handling capability High-density DB-62 connector Board ID
標簽: channels indicators activated isolated
上傳時間: 2016-02-15
上傳用戶:dongbaobao
Atheros無線芯片AR-6000系列wince 6驅動源代碼(這東西我也沒用過別問我,我是搜別的wince資源搜到的) AR6K SDIO support. Requires firmware 1.1 on SD13 cards. readme: Atheros Communications AR6001 WLAN Driver for SDIO installation Read Me March 26,2007 (based on k14 fw1.1) Windows CE Embedded CE 6.0 driver installation. 1. Unzip the installation file onto your system (called installation directory below) 2. Create an OS design or open an existing OS design in Platform Builder 6.0. a. The OS must support the SD bus driver and have an SD Host Controller driver (add these from Catalog Items). b. Run image size should be set to allow greater than 32MB. 3. a. From the Project menu select Add Existing Subproject... b. select AR6K_DRV.pbxml c. select open This should create a subproject within your OS Design project for the AR6K_DRV driver. 4. Build the solution. 轉自Tony嵌入式,原文地址:http://www.cevx.com/bbs/dispbbs.asp?boardID=4&ID=11762&page=1
標簽: wince Requires firmware Atheros
上傳時間: 2014-11-11
上傳用戶:bibirnovis