high frequency design：The eye diagram provides visual information that can be useful in the evaluation and troubleshooting of digital transmission systems
OSCILLATORS are key building blocks in integrated transceivers. In wired and
wireless communication terminals, the receiver front-end selects, amplifies and
converts the desired High-frequency signal to baseband. At baseband the signal can
then be converted into the digital domain for further data processing and demodula-
tion. The transmitter front-end converts an analog baseband signal to a suitable high-
frequency signal that can be transmitted over the wired or wireless channel.
射頻識(shí)別(Radio Frequency Identification，RFID)是一種允許非接觸式數(shù)據(jù)采集的自動(dòng)識(shí)別技術(shù)。其中工作在超高頻(Ultra High Frequency，UHF)頻段的無源RFID系統(tǒng)，由于在物流與供應(yīng)鏈管理等領(lǐng)域的潛在應(yīng)用，近年來得到了人們的廣泛關(guān)注。這種系統(tǒng)所使用的無源標(biāo)簽具有識(shí)別距離長、體積小、成本低廉等突出特點(diǎn)。目前在市場(chǎng)上出現(xiàn)了各種品牌型號(hào)的UHF RFID無源標(biāo)簽，由于不同品牌型號(hào)的標(biāo)簽在設(shè)計(jì)與制造工藝上的差異，這些標(biāo)簽在性能表現(xiàn)上各不相同，這就給終端用戶選擇合適自己應(yīng)用的標(biāo)簽帶來了困難。RFID基準(zhǔn)測(cè)試就是在實(shí)際部署RFID系統(tǒng)前對(duì)RFID標(biāo)簽的性能進(jìn)行科學(xué)評(píng)估的有效手段。然而為了在常規(guī)實(shí)驗(yàn)室條件下得到準(zhǔn)確公正的測(cè)試結(jié)果，需要對(duì)基準(zhǔn)測(cè)試的性能指標(biāo)及測(cè)試方法學(xué)開展進(jìn)一步的研究。本文正是研究符合EPC Class1 Gen2標(biāo)準(zhǔn)的RFID標(biāo)簽基準(zhǔn)測(cè)試。 本文首先分析了當(dāng)前廣泛應(yīng)用的超高頻無源RFID標(biāo)簽基準(zhǔn)測(cè)試性能指標(biāo)與測(cè)試方法上的局限性與不足之處。例如，在真實(shí)的應(yīng)用環(huán)境中，由于受到各種環(huán)境因素的影響，對(duì)同一品牌型號(hào)的標(biāo)簽，很難得到一致的識(shí)讀距離測(cè)試結(jié)果。另外，在某些測(cè)試場(chǎng)景中，使用識(shí)讀速率作為測(cè)試指標(biāo)，所得到的測(cè)試結(jié)果數(shù)值非常接近，以致分辨度不足以區(qū)分不同品牌型號(hào)標(biāo)簽的性能差異。在這些分析基礎(chǔ)上，本文把路徑損耗引入了RFID基準(zhǔn)測(cè)試，通過有限點(diǎn)的測(cè)量與數(shù)據(jù)擬合分別得到不同類型標(biāo)簽的路徑損耗方程，結(jié)合讀寫器天線的輻射方向圖，進(jìn)一步得到各種標(biāo)簽受限于讀寫器接收靈敏度的覆蓋區(qū)域。無源標(biāo)簽由于其被動(dòng)式能量獲取方式，其實(shí)際工作區(qū)域仍然受限于前向鏈路。本文通過實(shí)驗(yàn)測(cè)試出這些標(biāo)簽的最小激活功率后，得出了各種標(biāo)簽在一定讀寫器發(fā)射功率下的激活區(qū)域。完成這些步驟后，根據(jù)這兩種區(qū)域的交集可以確定標(biāo)簽的工作區(qū)域，從而進(jìn)行標(biāo)簽間的比較并達(dá)到基準(zhǔn)測(cè)試的目的，并能找出限制標(biāo)簽工作范圍的瓶頸。 本文最后從功率損耗的角度研究了標(biāo)簽之間的相互干擾，為用戶在密集部署RFID標(biāo)簽的場(chǎng)景中設(shè)置標(biāo)簽之間的最小間隔距離具有重要的參考意義。
Abstract: This application note describes how sampling clock jitter (time interval error or "TIE jitter") affectsthe performance of delta-sigma digital-to-analog converters (DACs). New insights explain the importanceof separately specifying low-frequency (< 2x passband frequency) and High-frequency or wideband (> 2xpassband frequency) jitter tolerance in these devices. The article also provides an application example ofa simple highly jittered cycle-skipped sampling clock and describes a method for generating a properbroadband jittered clock. The document then goes on to compare Maxim's audio DAC jitter tolerance tocompetitor audio DACs. Maxim's exceptionally high jitter tolerance allows very simple and low-cost sampleclock implementations.
The MAX17600–MAX17605 devices are high-speedMOSFET drivers capable of sinking /sourcing 4A peakcurrents. The devices have various inverting and noninvertingpart options that provide greater flexibility incontrolling the MOSFET. The devices have internal logiccircuitry that prevents shoot-through during output-statchanges. The logic inputs are protected against voltagespikes up to +14V, regardless of VDD voltage. Propagationdelay time is minimized and matched between the dualchannels. The devices have very fast switching time,combined with short propagation delays (12ns typ),making them ideal for High-frequency circuits. Thedevices operate from a +4V to +14V single powersupply and typically consume 1mA of supply current.The MAX17600/MAX17601 have standard TTLinput logic levels, while the MAX17603 /MAX17604/MAX17605 have CMOS-like high-noise margin (HNM)input logic levels. The MAX17600/MAX17603 are dualinverting input drivers, the MAX17601/MAX17604 aredual noninverting input drivers, and the MAX17602 /MAX17605 devices have one noninverting and oneinverting input. These devices are provided with enablepins (ENA, ENB) for better control of driver operation.
The LT®6552 is a specialized dual-differencing 75MHzoperational amplifier ideal for rejecting common modenoise as a video line receiver. The input pairs are designedto operate with equal but opposite large-signal differencesand provide exceptional high frequency commonmode rejection (CMRR of 65dB at 10MHz), therebyforming an extremely versatile gain block structure thatminimizes component count in most situations. The dualinput pairs are free to take on independent common modelevels, while the two voltage differentials are summedinternally to form a net input signal.
Linear Technology’s High Frequency Product lineupincludes a variety of RF I/Q modulators. The purpose ofthis application note is to illustrate the circuits requiredto interface these modulators with several popular D/Aconverters. Such circuits typically are required to maximizethe voltage transfer from the DAC to the baseband inputsof the modulator, as well as provide some reconstructionfi ltering.
Automotive batteries, industrial power supplies, distributedsupplies and wall transformers are all sources ofwide-ranging high voltage inputs. The easiest way to stepdown these sources is with a high voltage monolithicstep-down regulator that can directly accept a wide inputrange and produce a well-regulated output. The LT®3493accepts inputs from 3.6V to 36V and LT3481 acceptsinputs from 3.6V to 34V. Both provide excellent lineand load regulation and dynamic response. The LT3481offers a high effi ciency solution over a wide load range andkeeps the output ripple low during Burst Mode® operationwhile the LT3493 provides a tiny solution with minimalexternal components. The LT3493 operates at 750kHzand the LT3481 has adjustable frequency from 300kHzto 2.8MHz. High frequency operation enables the use ofsmall, low cost inductors and ceramic capacitors.
