The concept of the Altera Nios II embedded processor implementation inside Field Programmable Gate Array [FPGA] of the CCD camera for the “Pi of the Sky” experiment is presented. The digital board of the CCD camera, its most important components, current implementation of firmware [VHDL] inside the FPGA and the role of external 8051 microcontroller is briefly described. The main goal of the presented work is to get rid of the external microcontroller and to design new system with Nios II processor built inside FPGA chip. Constraints for implementing the design into the existing camera boards are discussed. New possibilities offered by a larger FPGA for next generation of cameras are considered.
The dinamyc link library that contains an implementation of SHA1, SHA512, CRC32, CRC32b, Adler32, Twofish, TEA[N] algorithms and ECB, CBC, CFB, OFB, CTR cipher modes.
