HIGH SPEED 8051 μC CORE
- Pipe-lined Instruction Architecture; Executes 70% of Instructions in 1 or 2
System Clocks
- Up to 25MIPS Throughput with 25MHz System Clock
- 22 Vectored Interrupt Sources
MEMORY
- 4352 Bytes Internal Data RAM (256 + 4k)
- 64k Bytes In-System Programmable FLASH Program Memory
- External Parallel Data Memory Interface – up to 5Mbytes/sec
DIGITAL PERIPHERALS
- 64 Port I/O; All are 5V tolerant
- Hardware SMBusTM (I2CTM Compatible), SPITM, and Two UART Serial
Ports Available Concurrently
- Programmable 16-bit Counter/Timer Array with 5 Capture/Compare
Modules
- 5 General Purpose 16-bit Counter/Timers
- Dedicated Watch-Dog Timer; Bi-directional Reset
CLOCK SOURCES
- Internal Programmable Oscillator: 2-to-16MHz
- External Oscillator: Crystal, RC, C, or Clock
- Real-Time Clock Mode using Timer 3 or PCA
SUPPLY VOLTAGE ........................ 2.7V to 3.6V
- Typical Operating Current: 10mA @ 25MHz
- Multiple Power Saving Sleep and Shutdown Modes
100-Pin TQFP (64-Pin Version Available)
Temperature Range: –40°C to +85°C
最近幾年新出的一些MCU，有很多都具有ISP（In System Programming：在系統編程）特性，利用這一特性可以在無需通用編程器的情況下，方便地對芯片執行各種操作（擦除，讀取，編程等操作）；如果進一步配上一些軟件（如Keil的ISD51），即可實現一些簡單的在線調試功能（當然要損失一個串口）。一些開發者，也經常在自己的系統上預留ISP接口，以供日后升級之用。可以說ISP的廣泛應用，標志著單片機開發技術的進步。
但是ISP功能的實現也有一定的限制，如需要一個串口，需要一定的駐留代碼空間，或者需要一定外部電路。于是有一些經驗不足的朋友，在實現ISP功能的時候便經常出問題，要么是外部電路的問題，要么是串口的問題。比如：為什么軟件老是報“通信出錯”；為什么我的系統，第一次可以進ISP，第二次就不行了；為什么我在Win98下無法進入ISP，換了WinXP就可以了。這些問題總是出現于一些細微的地方，一些被人忽略的地方，如果你沒有充足的時間，充足的精力，充足的耐心去尋找這些根源；如果你有一臺CP900編程器（當然其他的某些編程器也可以）；如果你不想在那塊可憐的小電路板上，再擠進一堆器件；如果你不想在購料單上再增加一批Max232，或者一批xx型電容,yy型電阻,那么請使用ICP吧（InCircuit Programming：在電路編程）。
The MSP-FET430U14 is a powerful flash emulation tool to quickly begin application development on the MSP430 MCU. It includes USB debugging interface used to program and debug the MSP430 in-system through the JTAG interface or the pin saving Spy Bi-Wire (2-wire JTAG) protocol. The flash memory can be erased and programmed in seconds with only a few keystrokes, and since the MSP430 flash is ultra-low power, no external power supply is required.
The debugging tool interfaces the MSP430 to the included integrated software environment and includes code to start your design immediately. The MSP-FET430UIF development tools supports development with all MSP430 flash devices
CCAVR軟件有ISP功能，能過調用STK500完成的，只要設置好參數，在ICCAVR中就可以給芯片編程了，還可以讓程序一編譯完就自動下載到芯片中，相當方便。在Tools->environment options->ISP里設定STK500.exe的路徑。— 用于調用STK500程序。在Tools->In system programming 里Programmer Interface中選中STK500。— 選擇STK500下載方式。在Tools->In system programming 里把Auto Program After Compile 的小勾選上。— 編譯后自動編程。在Tools->In system programming 中還有一些設置項，大家可以根據需要進行相關設置。下面的圖片是操作過程。
The CAT28LV64 is a low voltage, low power, CMOS Parallel EEPROM organized as 8K x 8−bits. It requires a simple interface for in−system programming. On−chip address and data latches, self−timed write cycle with auto−clear and VCC power up/down write protection eliminate additional timing and protection hardware. DATA Polling and Toggle status bit signal the start and end of the self−timed write cycle. Additionally, the CAT28LV64 features hardware and software write protection.
The μPSD32xx family, from ST, consists of Flash programmable system devices with a 8032 MicrocontrollerCore. Of these, the μPSD3234A and μPSD3254A are notable for having a complete implementationof the USB hardware directly on the chip, complying with the Universal Serial Bus Specification, Revision1.1.This application note describes a demonstration program that has been written for the DK3200 hardwaredemonstration kit (incorporating a μPSD3234A device). It gives the user an idea of how simple it is to workwith the device, using the HID class as a ready-made device driver for the USB connection.IN-APPLICATION-PROGRAMMING (IAP) AND IN-SYSTEM-PROGRAMMING (ISP)Since the μPSD contains two independent Flash memory arrays, the Micro Controller Unit (MCU) can executecode from one memory while erasing and programming the other. Product firmware updates in thefield can be reliably performed over any communication channel (such as CAN, Ethernet, UART, J1850)using this unique architecture. For In-Application-Programming (IAP), all code is updated through theMCU. The main advantage for the user is that the firmware can be updated remotely. The target applicationruns and takes care on its own program code and data memory.IAP is not the only method to program the firmware in μPSD devices. They can also be programmed usingIn-System-Programming (ISP). A IEEE1149.1-compliant JTAG interface is included on the μPSD. Withthis, the entire device can be rapidly programmed while soldered to the circuit board (Main Flash memory,Secondary Boot Flash memory, the PLD, and all configuration areas). This requires no MCU participation.The MCU is completely bypassed. So, the μPSD can be programmed or reprogrammed any time, anywhere, even when completely uncommitted.Both methods take place with the device in its normal hardware environment, soldered to a printed circuitboard. The IAP method cannot be used without previous use of ISP, because IAP utilizes a small amountof resident code to receive the service commands, and to perform the desired operations.
The AT89C52 is a low-power, high-performance CMOS 8-bit microcomputer with 8Kbytes of Flash programmable and erasable read only memory (PEROM). The deviceis manufactured using Atmel’s high-density nonvolatile memory technology and iscompatible with the industry-standard 80C51 and 80C52 instruction set and pinout.The on-chip Flash allows the program memory to be reprogrammed in-system or by aconventional nonvolatile memory programmer. By combining a versatile 8-bit CPUwith Flash on a monolithic chip, the Atmel AT89C52 is a powerful microcomputerwhich provides a highly-flexible and cost-effective solution to many embedded controlapplications.
This application note explains the XC9500™/XL/XV Boundary Scan interface anddemonstrates the software available for programming and testing XC9500/XL/XV CPLDs. Anappendix summarizes the iMPACT software operations and provides an overview of theadditional operations supported by XC9500/XL/XV CPLDs for in-system programming.
