Enhanced version of the Serial Peripheral INterface available on Motorola s MC68HC11 family of CPUs.Enhancements include a wider supported operating frequency range, 4deep read and write fifos, and programmable transfer count dependent interrupt generation.
As with the SPI found in MC68HC11 processors the core features programmable clock phase [CPHA] and clock polarity [CPOL]. The core features an 8bit wishbone INterface.
Very simple, very small.
標簽：
Peripheral
INterface
available
Enhanced
上傳時間：
2014-12-06
上傳用戶：invtnewer
