風(fēng)險(xiǎn)財(cái)務(wù)控制庫(kù)
Risk Quantify is an open source financial library, with a focus on
managing the risk of financial instruments. The aim of this project is
to provide people working in the financial industry with a good base to
use in building their own applications. Risk Quantify provides pricing
routines, term structure building and management, calendar routines,
asset management routines and more.
Data mining (DM) is the extraction of hidden predictive information from large databases
(DBs). With the automatic discovery of knowledge implicit within DBs, DM uses
sophisticated statistical analysis and modeling techniques to uncover patterns and relationships
hidden in organizational DBs. Over the last 40 years, the tools and techniques to
process structured information have continued to evolve from DBs to data warehousing
(DW) to DM. DW applications have become business-critical. DM can extract even more
value out of these huge repositories of information.
Sofia-SIP is an open-source SIP User-Agent library, compliant
with the IETF RFC3261 specification. It can be used as
a building block for SIP client software for uses such as VoIP,
IM, and many other real-time and person-to-person communication
services. The primary target platform for Sofia-SIP is
GNU/Linux. Sofia-SIP is based on a SIP stack developed at
the Nokia Research Center.
To use the ATLTrace tool:
Debug an MFC or ATL project select Start from the Debug menu.
Select MFC/ATL Trace Tool in the Tools menu.
Expand the tree control list in the Trace List window. Here you will see the running application, any modules within that application, and the trace categories for each module.
Customize, for each process, module, and category, which information is displayed in the output window. The Trace level control in the Process group is related to the ATLTRACE2 level only those ATLTRACE2 messages with a level equal to or greater than the setting in the Trace level control will be displayed in the output window.
Select Apply to put your settings into effect.
You can save your settings, and load them the next time you debug the application use the Save and Load buttons.
Testbenches have become an integral part of the design process, enabling you to verify that
your HDL model is sufficiently tested before implementing your design and helping you automate
the design verification process. It is essential, therefore, that you have confidence your
testbench is thoroughly exercising your design. Collecting code coverage statistics during simulation
helps to ensure the quality and thoroughness of your tests.
This sample provides an implementation of simple Bluetooth device discovery
via the Winsock 2 API. It provides a listbox control which, when searching
is complete, lists the discovered Bluetooth devices. Only names of the devices
are displayed, but the addresses of the devices are also retrieved, and can
be used to query the devices for more information (not implemented)
