The GRLIB Ip Library is an integrated set of reusable Ip cores, designed for system-on-chIp (SOC) development. The Ip cores are centered around the common on-chIp bus, and use a coherent method for simulation and synthesis. The library is vendor independent, with support for different CAD tools and target technologies. A unique plug&play method is used to configure and connect the Ip cores without the need to modify any global resources.
