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Just-in-time

  • 準時化生產(Just-in-time

    準時化生產(Just-in-time,JIT)誕生于20世紀50年代的日本,并于70年代全球石油危機中倍受關注。準時化生產是豐田生產方式的核心。它采用“看板管理”實現“拉動”式生產,與傳統的以計劃為主的“推動”式生產有著本質區別。全面質量管理、設備合理布置、作業標準化、設備快速調整以及良好的外部協作等方法,確保了準時化生產的順利實施。

    標簽: Just-in-time 準時

    上傳時間: 2017-05-25

    上傳用戶:zwei41

  • Kth Largest element in an array in time O(n) without sorting the entire array.

    Kth Largest element in an array in time O(n) without sorting the entire array.

    標簽: array Largest element sorting

    上傳時間: 2014-01-08

    上傳用戶:woshini123456

  • Star Trek_ Deep Space Nine - A Stitch in Time

    Star Trek_ Deep Space Nine - A Stitch in Time - Andrew J. Robinson 英文版 格式 epub

    標簽: Stitch Space Star Deep Nine Trek Time in

    上傳時間: 2021-06-17

    上傳用戶:potato

  • 分數階統一混沌系統的離散算法-This the program for fractional order Unified system, a simple but fast method in ti

    分數階統一混沌系統的離散算法-This the program for fractional order Unified system, a simple but fast method in time domain.

    標簽: fractional program Unified method

    上傳時間: 2014-01-22

    上傳用戶:lo25643

  • LTC6994參考設計及PCB布線規則

    Demonstration circuit 1562A is an engineering toolto design and evaluate the LTC699X-X family ofTimerBlox circuits. The center section of the boardcontains a pre-configured TimerBlox function.DC1562A comes in twelve timing function variationsas outlined in Table 1.Surrounding the center board is a ”playground”prototyping area. The prototyping area has padsfor Dip-8, S8, MS8, or S6 packages with breadboarding connections to each pin and two convenientpower buses and ground bus surrounding theentire area. This area is for conditioning signals tocontrol the timer function and for adding loads controlled in time.

    標簽: 6994 LTC PCB 參考設計

    上傳時間: 2013-10-18

    上傳用戶:如果你也聽說

  • Input Signal Rise and Fall Tim

    All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.For input signals, which do not provide the required rise/fall times, external circuitry mustbe used to shape the signal transitions.In the attached diagram, the effect of the sample rate is shown. The numbers 1 to 5 in thediagram represent possible sample points. Waveform a) shows the result if the inputsignal transition time through the undefined TTL-level area is less than the time distancebetween the sample points (sampling at 1, 2, 3, and 4). Waveform b) can be the result ifthe sampling is performed more than once within the undefined area (sampling at 1, 2, 5,3, and 4).Sample points:1. Evaluation of the signal clearly results in a low level2. Either a low or a high level can be sampled here. If low is sampled, no transition willbe detected. If the sample results in a high level, a transition is detected, and anappropriate action (e.g. capture) might take place.3. Evaluation here clearly results in a high level. If the previous sample 2) had alreadydetected a high, there is no change. If the previous sample 2) showed a low, atransition from low to high is detected now.

    標簽: Signal Input Fall Rise

    上傳時間: 2013-10-23

    上傳用戶:copu

  • 介紹C16x系列微控制器的輸入信號升降時序圖及特性

    All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.

    標簽: C16x 微控制器 輸入信號 時序圖

    上傳時間: 2014-04-02

    上傳用戶:han_zh

  • madCollection 2.5.2.6 full source This is not your every day VCL component collection. You won t se

    madCollection 2.5.2.6 full source This is not your every day VCL component collection. You won t see many new colored icons in the component palette. My packages don t offer many visual components to play with. Sorry, if you expected that! My packages are about low-level stuff for the most part, with as easy handling as possible. To find the hidden treasures, you will have to look at the documentation (which you re reading just in the moment). Later I plan on writing some nice demos, but for now the documentation must be enough to get you started.

    標簽: madCollection collection component source

    上傳時間: 2014-01-18

    上傳用戶:yoleeson

  • DFT(Discrete Fourier Transformation)是數字信號分析與處理如圖形、語音及圖像等領域的重要變換工具

    DFT(Discrete Fourier Transformation)是數字信號分析與處理如圖形、語音及圖像等領域的重要變換工具,直接計算DFT的計算量與變換區間長度N的平方成正比。當N較大時,因計算量太大,直接用DFT算法進行譜分析和信號的實時處理是不切實際的。快速傅立葉變換(Fast Fourier Transformation,簡稱FFT)使DFT運算效率提高1~2個數量級。其原因是當N較大時,對DFT進行了基4和基2分解運算。FFT算法除了必需的數據存儲器ram和旋轉因子rom外,仍需較復雜的運算和控制電路單元,即使現在,實現長點數的FFT仍然是很困難。本文提出的FFT實現算法是基于FPGA之上的,算法完成對一個序列的FFT計算,完全由脈沖觸發,外部只輸入一脈沖頭和輸入數據,便可以得到該脈沖頭作為起始標志的N點FFT輸出結果。由于使用了雙ram,該算法是流型(Pipelined)的,可以連續計算N點復數輸入FFT,即輸入可以是分段N點連續復數數據流。采用DIF(Decimation In Frequency)-FFT和DIT(Decimation In Time)-FFT對于算法本身來說是無關緊要的,因為兩種情況下只是存儲器的讀寫地址有所變動而已,不影響算法的結構和流程,也不會對算法復雜度有何影響。

    標簽: Transformation Discrete Fourier DFT

    上傳時間: 2016-04-12

    上傳用戶:lx9076

  • Computing and the way people use C for doing it keeps changing as years go by. So overwhelming has b

    Computing and the way people use C for doing it keeps changing as years go by. So overwhelming has been the response to all the previous editions of “Let Us C” that I have now decided that each year I would come up with a new edition of it so that I can keep the readers abreast with the way C is being used at that point in time.

    標簽: overwhelming Computing changing people

    上傳時間: 2013-12-23

    上傳用戶:epson850

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