嵌入式系統(tǒng)開發(fā) TOPPERS and JSP Kernel Release 1.3 TOPPERS = Toyohashi Open Platform for Embedded Real-Time Systems JSP = Just Standard Profile Kernel
標(biāo)簽： TOPPERS Toyohashi Embedded Platform
上傳時間： 2013-12-26
上傳用戶：清風(fēng)冷雨
用于motorala 68K系列處理器的小實時多任務(wù)操作系統(tǒng) The OMU Kernel was written to provide a cut-down Unix-like O/S for a home-made 6809-based home computer built by me, Steven Hosgood, in the early 1980s. This package contains the RTOS version of omu68k, derived from a port of the original 6809 code to the 68000 done by Terry Barnaby and me.
標(biāo)簽： Unix-like motorala cut-down provide
上傳時間： 2014-01-21
上傳用戶：1159797854
Electronic design automation (EDA) company providing logic synthesis and analysis tools for FPGA and ASIC designers.
標(biāo)簽： Electronic automation and providing
上傳時間： 2014-01-10
上傳用戶：四只眼
原名稱：CSS Cascading Style Sheets for Web Design，英文
標(biāo)簽： Cascading Sheets Design Style
上傳時間： 2013-12-16
上傳用戶：yangbo69
update patch to linux kernel 2.6.18-git15
標(biāo)簽： update kernel patch linux
上傳時間： 2014-01-27
上傳用戶：youlongjian0
update patch to linux kernel to 2.4.34-pre3
標(biāo)簽： update kernel patch linux
上傳時間： 2013-12-26
上傳用戶：磊子226
On the design of an FPGA-Based OFDM modulator for IEEE 802.11a
標(biāo)簽： FPGA-Based modulator 802.11 design
上傳時間： 2014-12-01
上傳用戶：redmoons
是一本好書,verilog HDL,a guide to digital design and synthesis
標(biāo)簽： synthesis verilog digital design
上傳時間： 2015-07-14
上傳用戶：熊少鋒
1)Learn more about the capabilities in Quartus: 2)Learn to use different design entry techniques 2)Design entry methods available within Quartus Text editor,Block diagram/schematic file editor, Quartus interface with design entry/synthesis tools from Exemplar, Synopsys, Synplicity and Viewlogic
標(biāo)簽： Learn capabilities techniques different
上傳時間： 2014-01-18
上傳用戶：yxgi5
The DSP Design Flow workshop provides an introduction to the advanced tools you need to design and implement DSP algorithms targeting FPGAs. This intermediate workshop in implementing DSP functions focuses on learning how to use System Generator for DSP, as well as HDL design flow, CORE Generator software, and design implementation tools. Through hands-on exercises, you will implement a design from algorithm concept to verification.
標(biāo)簽： introduction workshop provides advanced
上傳時間： 2014-12-06
上傳用戶：sammi
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