現有基于MAX7219芯片的數碼管驅動電路只適用于小尺寸LED，為擴展其使用范圍，在介紹動態顯示芯片MAX7219功能的基礎上，提出了一個基于該芯片的8位高亮度8英寸數碼管驅動電路。電路保留了MAX7219芯片的功能強大、編程簡單等優點，通過74LS273鎖存器和ULN2803達林頓驅動器，實現了對任意大尺寸數碼管提供較高電壓和電流驅動的靜態顯示，并亮度可調。
Abstract:
The existing display-driving circuit based on MAX7219 was only applicable to small-size LED. To expand its use, based on the function introduction of dynamic display chip MAX7219, a display-driving circuit for high-brightness 8-bit LED with the size of 8-inch was proposed. The advantages of MAX7219 were retained, such as powerful function and simple programming. Static display with adjustable brightness for large-size LED with higher voltage and current was achieved with the help of 74LS273 and ULN2803.
AVR32801: UC3A3 Schematic Checklist Features • Power circuit • Reset circuit • USB connection • External bus interface • ABDAC sound DAC interface • JTAG and Nexus debug ports • Clocks and crystal oscillators • MMC, SD-card, SDHC, SDIO and CE-ATA interface 1 Introduction A good hardware design comes from a proper schematic. Since UC3A3 devices have a fair number of pins and functions, the schematic for these devices can be large and quite complex. This application note describes a common checklist which should be used when starting and reviewing the schematics for a UC3A3 design.
為深入了解基于UC3854A控制的PFC變換器中的動力學特性，研究系統參數變化對變換器中分岔現象的影響，在建立Boost PFC變換器雙閉環數學模型的基礎上，用Matlab軟件對變換器中慢時標分岔及混沌等不穩定現象進行了仿真。在對PFC變換器中慢時標分岔現象仿真的基礎上，分析了系統參數變化對分岔點的影響，并進行了仿真驗證。仿真結果清晰地顯示了輸入整流電壓的幅值變化對系統分岔點的影響。
Abstract:
In order to better understand the dynamics characteristic of power factor correction converter based on UC3854A， and make the way that parameters change influences the bifurcation phenomena of the system clearly. The math model of the two closed loop circuits to the Boost PFC （Power Factor Correction） converter controller was built. Then， with the help of Matlab， the simulation for nonlinear phenomena such as chaos and slow-scale bifurcation in the PFC converter was made. Finally the factors that have influence to the phenomenon of bifurcation under slow-scale in PFC converter were analyzed. The simulation results clearly show the parameters change influences the bifurcation point of the system.
The 87C576 includes two separate methods of programming theEPROM array, the traditional modified Quick-Pulse method, and anew On-Board Programming technique (OBP).Quick Pulse programming is a method using a number of devicepins in parallel (see Figure 1) and is the traditional way in which87C51 family members have been programmed. The Quick-Pulsemethod supports the following programming functions:– program USER EPROM– verify USER EPROM– program KEY EPROM– program security bits– verify security bits– read signature bytesThe Quick-Pulse method is quite easily suited to standardprogramming equipment as evidenced by the numerous vendors of87C51 compatible programmers on the market today. Onedisadvantage is that this method is not well suited to programming inthe embedded application because of the large number of signallines that must be isolated from the application. In addition, parallelsignals from a programmer would need to be cabled to theapplication’s circuit board, or the application circuit board wouldneed to have logic built-in to perform the programming functions.These requirements have generally made in-circuit programmingusing the modified Quick Pulse method impractical in almost all87C51 family applications.
針對飛行模擬器座艙數據采集的復雜性，設計了一種基于以太網分布式的數據采集控制系統，該系統是RCM5700微處理器模塊上的以太網應用。在系統的基礎上具體討論了PoE技術的應用，在傳輸數據的網線上同時提供電流，提出并實現了一種包括輔助電源在內的完整可靠的PoE供電方案。設計采用美國國家半導體的LM5073和LM5576并根據不同的負載情況，進行穩定可靠的電壓轉換，以滿足數據采集電路的要求。實驗結果表明：該設計穩定可靠，滿足低于13 W的采集節點供電要求，提高了模擬器信號采集系統的通用性和標準化程度，避免了以往數據采集節點單獨繁瑣的電源設計。
Abstract:
Aiming at the complexity of large avion simulation and controlling，the simulator cabin distribute data collecting and control system was designed. This system is the application of RCM5700 on Ethernet. Based on this system，PoE technique that makes Ethernet can also provide power were expounded with emphasis and included FAUX design the PoE resolution was realized. To achieve the requirement of this system，LM5073 and LM5576 were used to DC-DC switch. From the data of experiment，the design filled the requirement of power-need of node whose power was lower than 13W. The application of the technique can advance the degree of simulation data collections currency and standardization and avoid designing additional power system.
為滿足無線網絡技術具有低功耗、節點體積小、網絡容量大、網絡傳輸可靠等技術要求，設計了一種以MSP430單片機和CC2420射頻收發器組成的無線傳感節點。通過分析其節點組成，提出了ZigBee技術中的幾種網絡拓撲形式，并研究了ZigBee路由算法。針對不同的傳輸要求形式選用不同的網絡拓撲形式可以盡大可能地減少系統成本。同時針對不同網絡選用正確的ZigBee路由算法有效地減少了網絡能量消耗，提高了系統的可靠性。應用試驗表明，采用ZigBee方式通信可以提高傳輸速率且覆蓋范圍大，與傳統的有線通信方式相比可以節約40%左右的成本。
Abstract:
To improve the proposed technical requirements such as low-ower， small nodes， large capacity and reliable network transmission， wireless sensor nodes based on MSP430 MCU and CC2420 RF transceiver were designed. This paper provided network topology of ZigBee technology by analysing the component of the nodes and researched ZigBee routing algorithm. Aiming at different requirements of transmission mode to choose the different network topologies form can most likely reduce the system cost. And aiming at different network to choose the correct ZigBee routing algorithm can effectively reduced the network energy consumption and improved the reliability of the system. Results show that the communication which used ZigBee mode can improve the transmission rate， cover more area and reduce 40% cost compared with traditional wired communications mode.
The Virtex-4 features, such as the programmable IDELAY and built-in FIFO support, simplifythe bridging of a high-speed, PCI-X core to large amounts of DDR-SDRAM memory. Onechallenge is meeting the PCI-X target initial latency specification. PCI-X Protocol Addendum tothe PCI Local Bus Specification Revision 2.0a ([Ref 6]) dictates that when a target signals adata transfer, "the target must do so within 16 clocks of the assertion of FRAME#." PCItermination transactions, such as Split Response/Complete, are commonly used to meet thelatency specifications. This method adds complexity to the design, as well as additional systemlatency. Another solution is to increase the ratio of the memory frequency to the PCI-X busfrequency. However, this solution increases the required power and clock resource usage.
Abstract: How can an interface change a happy face to a sad face? Engineers have happy faces when an interface works properly.Sad faces indicate failure somewhere. Because interfaces between microprocessors and ICs are simple—even easy—they are oftenignored until interface failure causes sad faces all around. In this article, we discuss a common SPI error that can be almostimpossible to find in a large system. Links to interface tutorial information are provided for complete information. Noise as a systemissue and ICs to minimize its effects are also described.
