The Xilinx Zynq-7000 Extensible Processing Platform (EPP) redefines the possibilities for embedded systems, giving system and software architects and developers a flexible platform to launch their new solutions and traditional ASIC and ASSP users an alternative that aligns with today’s programmable imperative. The new class of product elegantly combines an industrystandard ARMprocessor-based system with Xilinx 28nm programmable LOGIC—in a single device. The processor boots first, prior to configuration of the programmable LOGIC. This, along with a streamlined workflow, saves time and effort and lets software developers and hardware designers start development simultaneously.
上傳時間： 2013-10-09
上傳用戶：evil
One of the most misunderstood constructs in the Verilog language is the nonblockingassignment. Even very experienced Verilog designers do not fully understand how nonblockingassignments are scheduled in an IEEE compliant Verilog simulator and do not understand whenand why nonblocking assignments should be used. This paper details how Verilog blocking andnonblocking assignments are scheduled, gives important coding guidelines to infer correctsynthesizable LOGIC and details coding styles to avoid Verilog simulation race conditions
上傳時間： 2013-11-01
上傳用戶：xzt
One of the strengths of Synplify is the Finite State Machine compiler. This is a powerfulfeature that not only has the ability to automatically detect state machines in the sourcecode, and implement them with either sequential, gray, or one-hot encoding. But alsoperform a reachability analysis to determine all the states that could possibly bereached, and optimize away all states and transition LOGIC that can not be reached.Thus, producing a highly optimal final implementation of the state machine.
標簽： Synplicity Machine Verilog Design
上傳時間： 2013-10-20
上傳用戶：蒼山觀海
教學提示：可編程序控制器(Programmable LOGIC Controller,簡稱PLC)是以微處理器為核心，綜合計算機技術、自動控制技術和通信技術發展起來的一種新型工業自動控制裝置。隨著大規模、超大規模集成電路技術和數字通信技術的進步和發展，PLC技術不斷提高，在工業生產中獲得極其廣泛的應用。教學要求：本章讓學生了解PLC及其控制系統的基本知識，重點了解PLC的技術特點、類型以及發展概況。第一章 可編程序控制器概論1.1 PLC的定義及特點1.1.1 PLC的產生及定義1.1.2 PLC的特點1.1.3 PLC的分類1.2 PLC的發展趨勢
標簽： 可編程序控制器
上傳時間： 2013-10-28
上傳用戶：bnfm
GAL(generic array LOGIC)是美國晶格半導體公 司(gem 0udu or)最新推出的可電擦寫、可重復編 程、可加密的一種可編程邏輯器件(PLD)。這是第二 代PAL， 亦是目前最理想的可多次編程的邏輯電路。 它不象PAL是一次性編程，品種鄉 也不像EPSOM 需要用紫外線照射擦除。GAL 電路能反復編程 采用 的是電擦除技術 可隨時進行修改，其內部有一個特殊 結構控制字，使它芯片類型少，功能全。目前普遍果用 的芯片只有兩種：GAL16VS(20 g『腳)和GAL20V8 (24號『腳) 這兩種GAL能仿真所有的PAL，并能按 設計者自己的需要構成各種功能的邏輯電瑞在研制 開發新的電路系統時 極為方便。
標簽： GAL
上傳時間： 2013-10-20
上傳用戶：9牛10
Abstract: As industrial control systems (ICSs) have become increasingly connected and use more off-the-shelfcomponents, new vulnerabilities to cyber attacks have emerged. This tutorial looks at three types of ICSs:programmable LOGIC controllers (PLCs), supervisory control and data acquisition (SCADA) systems, anddistributed control systems (DCSs), and then discusses security issues and remedies. This document alsoexplains the benefits and limitations of two cryptographic solutions (digital signatures and encryption) andelaborates on the reasons for using security ICs in an ICS to support cryptography.
上傳時間： 2013-10-09
上傳用戶：woshinimiaoye
SL811開發資料_包含源程序_電路圖_芯片資料:SL811HS Embedded USB Host/Slave Controller.The SL811HS is an Embedded USB Host/Slave Controller capable of communicate with either full-speed or low-speed USB peripherals. The SL811HS can interface to devices such as microprocessors, microcontrollers, DSPs, or directly to a variety of buses such as ISA, PCMCIA, and others. The SL811HS USB Host Controller conforms to USB Specification 1.1.The SL811HS USB Host/Slave Controller incorporates USB Serial Interface functionality along with internal full-/low-speed transceivers.The SL811HS supports and operates in USB full-speed mode at 12 Mbps, or at low-speed 1.5-Mbps mode.The SL811HS data port and microprocessor interface provide an 8-bit data path I/O or DMA bidirectional, with interrupt support to allow easy interface to standard microprocessors or microcontrollers such as Motorola or Intel CPUs and many others. Internally,the SL811HS contains a 256-byte RAM data buffer which is used for control registers and data buffer.The available package types offered are a 28-pin PLCC (SL811HS) and a 48-pin TQFP package (SL811HST-AC). Both packages operate at 3.3 VDC. The I/O interface LOGIC is 5V-tolerant.
上傳時間： 2013-12-22
上傳用戶：a82531317
ngrep strives to provide most of GNU grep s common features, applying them to the network layer. ngrep is a pcap-aware tool that will allow you to specify extended regular or hexadecimal expressions to match against data payloads of packets. It currently recognizes TCP, UDP and ICMP across Ethernet, PPP, SLIP, FDDI, Token Ring and null interfaces, and understands bpf filter LOGIC in the same fashion as more common packet sniffing tools, such as tcpdump and snoop.
標簽： applying features network strives
上傳時間： 2014-01-15
上傳用戶：bcjtao
access the database using Flash MX. Please remember that Flash is unable to natively access a database. A programming language (ASP in this case) provides the programming LOGIC, while Flash works at the presentation tier of the application.
標簽： access Flash database remember
上傳時間： 2014-01-04
上傳用戶：小碼農lz
a collection of M-files to study concepts in the following areas of Fuzzy-Set-Theory: Fuzzy or Multivalued LOGIC, The Calculus of Fuzzy, Quantities, Approximate Reasoning, Possibility Theory, Fuzzy Control, Neuro-Fuzzy Systems.
標簽： Fuzzy-Set-Theory collection following concepts
上傳時間： 2015-04-03
上傳用戶：lili123
