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Photomultipliers (PMT), avalanche photodiodes (APD),ultrasonic transducers, capacitance microphones, radiationdetectors and similar devices require high voltage,low current bias. Additionally, the high voltage must bepristinely free of noise; well under a millivolt is a commonrequirement with a few hundred microvolts sometimesnecessary. Normally, switching regulator confi gurationscannot achieve this performance level without employingspecial techniques. One aid to achieving low noise is thatload currents rarely exceed 5mA. This freedom permitsoutput fi ltering methods that are usually impractical
標簽：
DCDC
高電壓
低噪音
轉換器
上傳時間：
2013-10-28
上傳用戶：lhw888
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The P89LPC912/913/914 are single-chip microcontrollers in low-cost 14-pin packages, based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system level functions have been incorporated into the P89LPC912/913/914 in order to reduce component count, board space, and system cost.
標簽：
P89
LPC
912
89
上傳時間：
2013-10-12
上傳用戶：司令部正軍級
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Mega16是一款采用先進RISC精簡指令，內置A/D的8位單片機，可支持低電壓聯機 Flash和EEPROM 寫入功能；同時還支持 Basic和C 等高級語言編程。用它設計電子時鐘不僅成本低，硬件簡單，而且很容易實現系統移植。介紹了如何利用AVR系列單片機Mega16及1602字符液晶來設計電子時鐘的方法，同時給出了相應的電路原理及部分語言程序。
Abstract:
?Mega16 is a high-performance, low power consumption, the use of advanced RISC concise instructions, built-in A/D 8-bit microcontrollers, the on-line support for low-voltage Flash, EEPROM write function. Except Mega16 also support the Basic, C, and other high-level language programming.The electronic clock which is deisgned by Mega16 is not only low-cost, simple hardware, but easy to achieve system migration.The design method of electrioic clock based on the AVR Mega16 and character LCD1602 is introduced in this paper,and the corresponding circuit electrionic and some language program are given.
標簽：
Mega
AVR
16
單片機
上傳時間：
2014-12-27
上傳用戶：zl5712176
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The MSP-FET430PIF is a Parallel Port interface (does not include target board) that is used to program and debug MSP430 FET tools and test boards through the JTAG interface. This interface is included in our FET tools, but sold without the development board. This interface uses a Parallel PC Port to communicate to the Debugger Software (IAR Kickstart software included) running on the PC. The interface uses the standard 14 pin header to communicate to the MSP430 device using the standard JTAG protocol.
The flash memory can be erased and programmed in seconds with only a few keystrokes, and since the MSP430 flash is extremely low power, no external power supply is required. The tool has an integrated software environment and connects directly to the PC which greatly simplifies the set-up and use of the tool. The flash development tool supports development with all MSP430 flash parts.
Features
MSP430 debugging interface to connect a MSP430-Flash-device to a Parallel port on a PC
Supports JTAG debug protocol (NO support for Spy-Bi-Wire (2-wire JTAG) debug protocol, Spy-Bi-Wire (2-wire JTAG) is supported by MSP-FET430UIF)
Parallel Port cable and a 14-conductor target cable
Full documentation on CD ROM
Integrated IAR Kickstart user interface which includes:
Assembler
Linker
Limulator
Source-level debugger
Limited C-compiler
Technical specifications:
Backwardly compatable with existing FET tool boards.
標簽：
FET
430
PIF
上傳時間：
2013-10-26
上傳用戶：fengweihao158@163.com
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The LPC1769/68/67/66/65/64 are ARM Cortex-M3 based microcontrollers for embedded applications featuring a high level of integration and low power consumption. The ARM Cortex-M3 is a next generation core that offers system enhancements such as enhanced debug features and a higher level of support block integration.
標簽：
LPC
1769
1768
1767
上傳時間：
2014-02-20
上傳用戶：13215175592
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Virtex-5, Spartan-DSP FPGAs Application Note
This application note demonstrates how efficient implementations of Digital Up Converters(DUC) and Digital Down Converters (DDC) can be done by leveraging the Xilinx DSP IPportfolio for increased productivity and reduced time to development. Step-by-step instruction is given on how to perform system-level trade off analysis and develop the most efficient FPGA implementation, thus allowing engineers a flexible, low-cost and low-power alternative to ASSP technologies.
標簽：
Spartan-DSP
Virtex
FPGAs
Ap
上傳時間：
2013-10-23
上傳用戶：raron1989
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摘要：本水位監測報警器使用5V低壓直流電源（也可以用3節5號電池代替）就可以對5~15厘米的水位進行監測，用LED顯示和數碼管顯示水位，并可以對不再此范圍內的水位發出報警。主要采用CD4066、74LS86、74LS32、CD4511芯片，再加上數碼管、蜂鳴器、發光二極管、電阻這些器件組成一個簡單而靈敏的監測報警電路，操作簡單，接通電源即可工作。因為大部分電路采用數字電路，所以本水位監測報警器還具有耗能低、準確性高的特點。關鍵字：譯碼電路 報警電路 監測電路
Abstract: The water level alarm monitoring the use of 5 V low-voltage DC power (can also use three batteries replaced on the 5th) will be able to 5 to 15 centimeters of water level monitoring, with LED display and digital display of water level, and this can no longer Within the scope of a water level alarm. Mainly CD4066, 74LS86, 74LS32, CD4511 chips, coupled with digital control, buzzer, light-emitting diode, the resistance of these devices composed of a simple and sensitive monitoring alarm circuits. Because the majority of circuits using digital circuitry, so the water level monitored alarm system also has low energy consumption, high accuracy of the characteristics.
Keyword: Decoding circuit alarm circuit monitoring circuit
標簽：
水位
監測報警
系統原理
上傳時間：
2013-11-05
上傳用戶：王慶才
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All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.
標簽：
C16x
微控制器
輸入信號
時序圖
上傳時間：
2014-04-02
上傳用戶：han_zh
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很多不同的廠家生產各種型號的計算機，它們運行完全不同的操作系統，但TCP.IP協議族允許它們互相進行通信。這一點很讓人感到吃驚，因為它的作用已遠遠超出了起初的設想。T C P / I P起源于6 0年代末美國政府資助的一個分組交換網絡研究項目，到9 0年代已發展成為計算機之間最常應用的組網形式。它是一個真正的開放系統，因為協議族的定義及其多種實現可以不用花錢或花很少的錢就可以公開地得到。它成為被稱作“全球互聯網”或“因特網(Internet)”的基礎，該廣域網（WA N）已包含超過1 0 0萬臺遍布世界各地的計算機。本章主要對T C P / I P協議族進行概述，其目的是為本書其余章節提供充分的背景知識。
TCP.IP協議 縮略語
ACK (ACKnowledgment) TCP首部中的確認標志
API (Application Programming Interface) 應用編程接口
ARP (Address Resolution Protocol) 地址解析協議
ARPANET(Defense Advanced Research Project Agency NETwork) (美國)國防部遠景研究規劃局
AS (Autonomous System) 自治系統
ASCII (American Standard Code for Information Interchange) 美國信息交換標準碼
ASN.1 (Abstract Syntax Notation One) 抽象語法記法1
BER (Basic Encoding Rule) 基本編碼規則
BGP (Border Gateway Protocol) 邊界網關協議
BIND (Berkeley Internet Name Domain) 伯克利I n t e r n e t域名
BOOTP (BOOTstrap Protocol) 引導程序協議
BPF (BSD Packet Filter) BSD 分組過濾器
CIDR (Classless InterDomain Routing) 無類型域間選路
CIX (Commercial Internet Exchange) 商業互聯網交換
CLNP (ConnectionLess Network Protocol) 無連接網絡協議
CRC (Cyclic Redundancy Check) 循環冗余檢驗
CSLIP (Compressed SLIP) 壓縮的S L I P
CSMA (Carrier Sense Multiple Access) 載波偵聽多路存取
DCE (Data Circuit-terminating Equipment) 數據電路端接設備
DDN (Defense Data Network) 國防數據網
DF (Don’t Fragment) IP首部中的不分片標志
DHCP (Dynamic Host Configuration Protocol) 動態主機配置協議
DLPI (Data Link Provider Interface) 數據鏈路提供者接口
DNS (Domain Name System) 域名系統
DSAP (Destination Service Access Point) 目的服務訪問點
DSLAM (DSL Access Multiplexer) 數字用戶線接入復用器
DSSS (Direct Sequence Spread Spectrum) 直接序列擴頻
DTS (Distributed Time Service) 分布式時間服務
DVMRP (Distance Vector Multicast Routing Protocol) 距離向量多播選路協議
EBONE (European IP BackbONE) 歐洲I P主干網
EOL (End of Option List) 選項清單結束
EGP (External Gateway Protocol) 外部網關協議
EIA (Electronic Industries Association) 美國電子工業協會
FCS (Frame Check Sequence) 幀檢驗序列
FDDI (Fiber Distributed Data Interface) 光纖分布式數據接口
FIFO (First In, First Out) 先進先出
FIN (FINish) TCP首部中的結束標志
FQDN (Full Qualified Domain Name) 完全合格的域名
FTP (File Transfer Protocol) 文件傳送協議
HDLC (High-level Data Link Control) 高級數據鏈路控制
HELLO 選路協議
IAB (Internet Architecture Board) Internet體系結構委員會
IANA (Internet Assigned Numbers Authority) Internet號分配機構
ICMP (Internet Control Message Protocol) Internet控制報文協議
IDRP (InterDomain Routing Protocol) 域間選路協議
IEEE (Institute of Electrical and Electronics Engineering) （美國）電氣與電子工程師協會
IEN (Internet Experiment Notes) 互聯網試驗注釋
IESG (Internet Engineering Steering Group) Internet工程指導小組
IETF (Internet Engineering Task Force) Internet工程專門小組
IGMP (Internet Group Management Protocol) Internet組管理協議
IGP (Interior Gateway Protocol) 內部網關協議
IMAP (Internet Message Access Protocol) Internet報文存取協議
IP (Internet Protocol) 網際協議
I RTF (Internet Research Task Force) Internet研究專門小組
IS-IS (Intermediate System to Intermediate System Protocol) 中間系統到中間系統協議
ISN (Initial Sequence Number) 初始序號
ISO (International Organization for Standardization) 國際標準化組織
ISOC (Internet SOCiety) Internet協會
LAN (Local Area Network) 局域網
LBX (Low Bandwidth X) 低帶寬X
LCP (Link Control Protocol) 鏈路控制協議
LFN (Long Fat Net) 長肥網絡
LIFO (Last In, First Out) 后進先出
LLC (Logical Link Control) 邏輯鏈路控制
LSRR (Loose Source and Record Route) 寬松的源站及記錄路由
MBONE (Multicast Backbone On the InterNEt) Internet上的多播主干網
MIB (Management Information Base) 管理信息庫
MILNET (MILitary NETwork) 軍用網
MIME (Multipurpose Internet Mail Extensions) 通用I n t e r n e t郵件擴充
MSL (Maximum Segment Lifetime) 報文段最大生存時間
MSS (Maximum Segment Size) 最大報文段長度
M TA (Message Transfer Agent) 報文傳送代理
MTU (Maximum Transmission Unit) 最大傳輸單元
NCP (Network Control Protocol) 網絡控制協議
NFS (Network File System) 網絡文件系統
NIC (Network Information Center) 網絡信息中心
NIT (Network Interface Tap) 網絡接口栓（S u n公司的一個程序）
NNTP (Network News Transfer Protocol) 網絡新聞傳送協議
NOAO (National Optical Astronomy Observatories) 國家光學天文臺
NOP (No Operation) 無操作
NSFNET (National Science Foundation NETwork) 國家科學基金網絡
NSI (NASA Science Internet) （美國）國家宇航局I n t e r n e t
NTP (Network Time Protocol) 網絡時間協議
NVT (Network Virtual Terminal) 網絡虛擬終端
OSF (Open Software Foudation) 開放軟件基金
OSI (Open Systems Interconnection) 開放系統互連
OSPF (Open Shortest Path First) 開放最短通路優先
PAWS (Protection Against Wrapped Sequence number) 防止回繞的序號
PDU (Protocol Data Unit) 協議數據單元
POSIX (Portable Operating System Interface) 可移植操作系統接口
PPP (Point-to-Point Protocol) 點對點協議
PSH (PuSH) TCP首部中的急迫標志
RARP (Reverse Address Resolution Protocol) 逆地址解析協議
RFC (Request For Comments) Internet的文檔，其中的少部分成為標準文檔
RIP (Routing Information Protocol) 路由信息協議
RPC (Remote Procedure Call) 遠程過程調用
RR (Resource Record) 資源記錄
RST (ReSeT) TCP首部中的復位標志
RTO (Retransmission Time Out) 重傳超時
RTT (Round-Trip Time) 往返時間
SACK (Selective ACKnowledgment) 有選擇的確認
SLIP (Serial Line Internet Protocol) 串行線路I n t e r n e t協議
SMI (Structure of Management Information) 管理信息結構
SMTP (Simple Mail Transfer Protocol) 簡單郵件傳送協議
SNMP (Simple Network Management Protocol) 簡單網絡管理協議
SSAP (Source Service Access Point) 源服務訪問點
SSRR (Strict Source and Record Route) 嚴格的源站及記錄路由
SWS (Silly Window Syndrome) 糊涂窗口綜合癥
SYN (SYNchronous) TCP首部中的同步序號標志
TCP (Transmission Control Protocol) 傳輸控制協議
TFTP (Trivial File Transfer Protocol) 簡單文件傳送協議
TLI (Transport Layer Interface) 運輸層接口
TTL (Ti m e - To-Live) 生存時間或壽命
TUBA (TCP and UDP with Bigger Addresses) 具有更長地址的T C P和U D P
Telnet 遠程終端協議
UA (User Agent) 用戶代理
UDP (User Datagram Protocol) 用戶數據報協議
URG (URGent) TCP首部中的緊急指針標志
UTC (Coordinated Universal Time) 協調的統一時間
UUCP (Unix-to-Unix CoPy) Unix到U n i x的復制
WAN (Wide Area Network) 廣域網
WWW (World Wide Web) 萬維網
XDR (eXternal Data Representation) 外部數據表示
XID (transaction ID) 事務標識符
XTI (X/Open Transport Layer Interface) X/ O p e n運輸層接口
標簽：
tcp
協議
上傳時間：
2013-11-13
上傳用戶：tdyoung
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Abstract: This reference design provides design ideas for a cost-effective, low-power liquid-level measurement dataacquisition system (DAS) using a compensated silicon pressure sensor and a high-precision delta-sigma ADC. Thisdocument discusses how to select the compensated silicon pressure sensor, suggest system algorithms, and providenoise analyses. It also describes calibration ideas to improve system performance while also reducing complexity andcost.
標簽：
如何選擇
補償
硅壓力傳感器
上傳時間：
2013-10-08
上傳用戶：sjy1991
