The MSP-FET430U14 is a powerful flash emulation tool to quickly begin application development on the MSP430 MCU. It includes USB debugging interface used to program and debug the MSP430 in-system through the JTAG interface or the pin saving Spy Bi-Wire (2-wire JTAG) protocol. The flash memory can be erased and programmed in seconds with only a few keystrokes, and since the MSP430 flash is ultra-low power, no external power supply is required.
The debugging tool interfaces the MSP430 to the included integrated software environment and includes code to start your design immediately. The MSP-FET430UIF development tools supports development with all MSP430 flash devices
根據(jù)看門狗電路的原理，設(shè)計出簡單適用、性能可靠的1TrL型看門狗電路以及價格低廉、性能可靠的微功耗CMOS型看門狗電路，同時還介紹了常用的uP監(jiān)視器O型看門狗電路。關(guān)鍵詞：看門狗電路；1TrL型；CMOS型Abstract：In accordance with the principle of WDT (Watch Dog Timer 1circuit，design a，IT．L type WTD circuit，it is a dimple an d applicable an d reliable on performanceo Design a CMOS type WTD circuit，it is low prices and mini-power consumption。Also the article describes a common uP type WTD circuit。Key word：WDT circuit；TFL type；CMOS typ e
The LPC1769/68/67/66/65/64 are ARM Cortex-M3 based microcontrollers for embedded applications featuring a high level of integration and low power consumption. The ARM Cortex-M3 is a next generation core that offers system enhancements such as enhanced debug features and a higher level of support block integration.
Virtex-5, Spartan-DSP FPGAs Application Note
This application note demonstrates how efficient implementations of Digital Up Converters(DUC) and Digital Down Converters (DDC) can be done by leveraging the Xilinx DSP IPportfolio for increased productivity and reduced time to development. Step-by-step instruction is given on how to perform system-level trade off analysis and develop the most efficient FPGA implementation, thus allowing engineers a flexible, low-cost and low-power alternative to ASSP technologies.
The CAT28LV64 is a low voltage, low power, CMOS Parallel EEPROM organized as 8K x 8−bits. It requires a simple interface for in−system programming. On−chip address and data latches, self−timed write cycle with auto−clear and VCC power up/down write protection eliminate additional timing and protection hardware. DATA Polling and Toggle status bit signal the start and end of the self−timed write cycle. Additionally, the CAT28LV64 features hardware and software write protection.
MC9S08QG8英文資料
The MC9S08QG8 is the newest member of the Freescale 8-bit family of highly integratedmicrocontrollers, based on the high-performance yet low power HCS08 core. The MC9S08QG8is an excellent solution for power-sensitive applications with extended battery life and maximum performance down to 1.8VDC.
The PCA9534 is a 16-pin CMOS device that provide 8 bits of General Purpose parallel
Input/Output (GPIO) expansion for I2C-bus/SMBus applications and was developed to
enhance the NXP Semiconductors family of I2C-bus I/O expanders. The improvements
include higher drive capability, 5 V I/O tolerance, lower supply current, individual I/O
configuration, 400 kHz clock frequency, and smaller packaging. I/O expanders provide a
simple solution when additional I/O is needed for ACPI power switches, sensors,
push buttons, LEDs, fans, etc.
The PCA9517 is a CMOS integrated circuit that provides level shifting between lowvoltage (down to 0.9 V) and higher voltage (2.7 V to 5.5 V) I2C-bus or SMBus applications.While retaining all the operating modes and features of the I2C-bus system during thelevel shifts, it also permits extension of the I2C-bus by providing bidirectional buffering forboth the data (SDA) and the clock (SCL) lines, thus enabling two buses of 400 pF. Usingthe PCA9517 enables the system designer to isolate two halves of a bus for both voltageand capacitance. The SDA and SCL pins are over voltage tolerant and arehigh-impedance when the PCA9517 is unpowered.
