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In an increasing trend, telecommunications, networking,audio and instrumentation require low noise power supplies.In particular, there is interest in low noise, lowdropout linear regulators (LDO). These components powernoise-sensitive circuitry, circuitry that contains noisesensitiveelements or both. Additionally, to conserve power,particularly in battery driven apparatus such as cellulartelephones, the regulators must operate with low input-tooutputvoltages.1 Devices presently becoming availablemeet these requirements (see separate section, “A Familyof 20mVRMS Noise, Low Dropout Regulators”).
標簽：
低噪聲
低壓差穩壓器
性能
上傳時間：
2013-10-30
上傳用戶：yeling1919
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介紹了采用ATmega48單片機實現三相無刷直流電機控制器的方法。利用Atmega48獲得帶死區的脈寬調制（PWM）、霍爾傳感器的換相處理、正弦驅動信號的產生和電機轉速的控制等功能。采用該方法的優點是所需的外圍器件少，成本低。
Abstract:
The method of 3-phase brushless DC motor control based on ATmega48 is presented in this paper.The system uses ATmega48 to generate PWM signals with dead-time, hall sensors signals commutation，sine driving signal and rotational speed of motor.Using this method，the needed external devices are few, the cost is low.
標簽：
ATmega
48
無刷電機
控制方法
上傳時間：
2013-12-09
上傳用戶：330402686
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All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.For input signals, which do not provide the required rise/fall times, external circuitry mustbe used to shape the signal transitions.In the attached diagram, the effect of the sample rate is shown. The numbers 1 to 5 in thediagram represent possible sample points. Waveform a) shows the result if the inputsignal transition time through the undefined TTL-level area is less than the time distancebetween the sample points (sampling at 1, 2, 3, and 4). Waveform b) can be the result ifthe sampling is performed more than once within the undefined area (sampling at 1, 2, 5,3, and 4).Sample points:1. Evaluation of the signal clearly results in a low level2. Either a low or a high level can be sampled here. If low is sampled, no transition willbe detected. If the sample results in a high level, a transition is detected, and anappropriate action (e.g. capture) might take place.3. Evaluation here clearly results in a high level. If the previous sample 2) had alreadydetected a high, there is no change. If the previous sample 2) showed a low, atransition from low to high is detected now.
標簽：
Signal
Input
Fall
Rise
上傳時間：
2013-10-23
上傳用戶：copu
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All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.
標簽：
C16x
微控制器
輸入信號
時序圖
上傳時間：
2014-04-02
上傳用戶：han_zh
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Frequently, voltage reference stability and noise defi nemeasurement limits in instrumentation systems. In particular,reference noise often sets stable resolution limits.Reference voltages have decreased with the continuingdrop in system power supply voltages, making referencenoise increasingly important. The compressed signalprocessing range mandates a commensurate reductionin reference noise to maintain resolution. Noise ultimatelytranslates into quantization uncertainty in A to D converters,introducing jitter in applications such as scales, inertialnavigation systems, infrared thermography, DVMs andmedical imaging apparatus. A new low voltage reference,the LTC6655, has only 0.3ppm (775nV) noise at 2.5VOUT.Figure 1 lists salient specifi cations in tabular form. Accuracyand temperature coeffi cient are characteristic ofhigh grade, low voltage references. 0.1Hz to 10Hz noise,particularly noteworthy, is unequalled by any low voltageelectronic reference.
標簽：
低噪聲
電壓基準
噪聲測量
上傳時間：
2013-10-30
上傳用戶：wxhwjf
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16kb/s Low Delay CELP 算法
標簽：
Delay
CELP
Low
16
上傳時間：
2015-01-03
上傳用戶：huangld
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Low End Microchip PICs C函數
標簽：
Microchip
PICs
Low
End
上傳時間：
2015-01-06
上傳用戶：helmos
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int trace (int i, int j, int low, IMAGE im,IMAGE mag, IMAGE ori) float gauss(float x, float sigma) float dGauss (float x, float sigma) float meanGauss (float x, float sigma) void hysteresis (int high, int low, IMAGE im, IMAGE mag, IMAGE oriim) void canny (float s, IMAGE im, IMAGE mag, IMAGE ori)
標簽：
IMAGE
float
int
gauss
上傳時間：
2015-01-30
上傳用戶：杜瑩12345
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Packet Capture with Libpcap and other Low Level Network Tricks.rar
標簽：
Capture
Libpcap
Network
Packet
上傳時間：
2015-02-08
上傳用戶：lx9076
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3 phase motor driver source code with freescale MCU
標簽：
freescale
driver
source
phase
上傳時間：
2015-03-05
上傳用戶：wangyi39
