A combined space鈥搕ime block coding (STBC) and eigen-space tracking
(EST) scheme in MULTIPLE-input-MULTIPLE-output systems is
proposed. It is proved that the STBC-EST is capable of shifting
hardware complexity from the receiver to the transmitter without
any bit error rate (BER) performance loss. A computation efficient
EST algorithm is also proposed, which makes the STBC-EST affordable.
Simulation results show that the STBC-EST with a modest
feedback requirement results in a negligible BER performance loss
compared with a dual system configuration.
contains documents related to adaptive beamforming algorithms for Wideband Code Division MULTIPLE access and a research article on circular patch antenna for C band altimeter system
The purpose of this project is to explore the issues and implementation of a MULTIPLE instruction stream, single data stream processor. We are running two instruction streams on two CPUs which share an address space. The processors share a second level cache, and maintain coherence at the L1 cache with a write-invalidate policy. The L2 cache is two-way set associative, with a block size of 8 words, and a total capacity of 512 words.
