本文介紹了基于AT89C52 單片機的自動水溫控制系統的設計及實現過程。該系統具有實時顯示、溫度測量、溫度設定并能根據設定值對環境溫度進行調節實現控溫的目的以及達到上下限溫度報警功能，控制算法是基于數字PID 算法。關鍵詞 ：PID AT89C52 脈寬調制 實時 Abstract ： This article describes AT89C52 single-chip microcomputer-basedautomatic water temperature control system design and implementation process. Thesystem has real-time display, temperature measurement, temperature settings and theenvironment in accordance with the temperature settings adjusted to achieve thepurpose of temperature control and reach the upper and lower limits of temperaturealarm function, the control algorithm is based on the digital PID algorithm.Keyword: PID AT89C52 PWM real time
上傳時間： 2013-10-10
上傳用戶：歸海惜雪
NEC 16位MCU參考手冊 The 78K0R/IC3 is a 16-bit single-chip microcontroller that uses a 78K0R CPU core and incorporates peripheral functions, such as ROM/RAM, a multi-function timer, a multi-function serial interface, an A/D converter, a programmable gain amplifier (PGA), a comparator, a real-time counter, and a watchdog timer.
上傳時間： 2013-11-02
上傳用戶：努力努力再努力
C51使用手冊 .pdf 第二節內存區域(Memory Areas)1. Pragram Area由Code 說明可有多達64kBytes 的程序存儲器2. Internal Data Memory:內部數據存儲器可用以下關鍵字說明data 直接尋址區為內部RAM 的低128 字節00H 7FHidata 間接尋址區 包括整個內部RAM 區00H FFHbdata 可位尋址區 20H 2FH3. External Data Memory外部RAM 視使用情況可由以下關鍵字標識xdata 可指定多達64KB 的外部直接尋址區地址范圍0000H 0FFFFHpdata 能訪問1 頁(25bBytes)的外部RAM 主要用于緊湊模式(Compact Model)4. Speciac Function Register Memory
上傳時間： 2013-11-19
上傳用戶：busterman
CAT5110/18/19/23/24/25 linear-taper digitally programmable potentiometers perform the same function as a mechanical potentiometer or a variable resistor. These devices consist of a fixed resistor and a wiper contact with 32-tap points that are digitally controlled through a2-wire up/down serial interface.
上傳時間： 2013-11-22
上傳用戶：541657925
MC9S08QG8英文資料 The MC9S08QG8 is the newest member of the Freescale 8-bit family of highly integratedmicrocontrollers, based on the high-performance yet low power HCS08 core. The MC9S08QG8is an excellent solution for power-sensitive applications with extended battery life and maximum performance down to 1.8VDC.
上傳時間： 2014-12-28
上傳用戶：dxxx
The PCA9549 provides eight bits of high speed TTL-compatible bus switching controlledby the I2C-bus. The low ON-state resistance of the switch allows connections to be madewith minimal propagation delay. Any individual A to B channel or combination of channelscan be selected via the I2C-bus, determined by the contents of the programmable Controlregister. When the I2C-bus bit is HIGH (logic 1), the switch is on and data can flow fromPort A to Port B, or vice versa. When the I2C-bus bit is LOW (logic 0), the switch is open,creating a high-impedance state between the two ports, which stops the data flow.An active LOW reset input (RESET) allows the PCA9549 to recover from a situationwhere the I2C-bus is stuck in a LOW state. Pulling the RESET pin LOW resets the I2C-busstate machine and causes all the bits to be open, as does the internal power-on resetfunction.
上傳時間： 2014-11-22
上傳用戶：xcy122677
The PCA9548A is an octal bidirectional translating switch controlled via the I2C-bus. TheSCL/SDA upstream pair fans out to eight downstream pairs, or channels. Any individualSCx/SDx channel or combination of channels can be selected, determined by thecontents of the programmable control register.An active LOW reset input allows the PCA9548A to recover from a situation where one ofthe downstream I2C-buses is stuck in a LOW state. Pulling the RESET pin LOW resets theI2C-bus state machine and causes all the channels to be deselected as does the internalPower-on reset function.
上傳時間： 2013-10-13
上傳用戶：bakdesec
MSP430系列單片機C語言程序設計與開發MSP430系列是一個具有明顯技術特色的單片機品種。關于它的硬件特性及匯編語言程序設計已在《MSP430系列超低功耗16位單片機的原理與應用》及《MSP430系列 FLASH型超低功耗16位單片機》等書中作了全面介紹。《MSP430系列單片機C語言程序設計與開發》介紹IAR公司為MSP430系列單片機配備的C程序設計語言C430。書中敘述了C語言的基本概念、C430的擴展特性及C庫函數；對C430的集成開發環境的使用及出錯信息作了詳盡的說明；并以MSP430F149為例，對各種應用問題及外圍模塊操作提供了典型的C程序例程，供讀者在今后的C430程序設計中參考。 《MSP430系列單片機C語言程序設計與開發》可以作為高等院校計算機、自動化及電子技術類專業的教學參考書，也可作為工程技術人員設計開發時的技術資料。MSP430系列超低功耗16位單片機的原理與應用目錄MSP430系列單片機C語言程序設計與開發 目錄 第1章 C語言基本知識1.1 標識符與關鍵字11.1.1 標識符11.1.2 關鍵字11.2 數據基本類型21.2.1 整型數據21.2.2 實型數據31.2.3 字符型數據41.2.4 各種數據轉換關系61.3 C語言的運算符71.3.1 算術運算符71.3.2 關系運算符和邏輯運算符71.3.3 賦值運算符81.3.4 逗號運算符81.3.5 ? 與 ：運算符81.3.6 強制轉換運算符91.3.7 各種運算符優先級列表91.4 程序設計的三種基本結構101.4.1 語句的概念101.4.2 順序結構111.4.3 選擇結構121.4.4 循環結構141.5 函數181.5.1 函數定義181.5.2 局部變量與全局變量191.5.3 形式參數與實際參數201.5.4 函數調用方式201.5.5 函數嵌套調用211.5.6 變量的存儲類別221.5.7 內部函數和外部函數231.6 數組231.6.1 一維數組241.6.2 多維數組241.6.3 字符數組261.7 指針271.7.1 指針與地址的概念271.7.2 指針變量的定義281.7.3 指針變量的引用281.7.4 數組的指針281.7.5 函數的指針301.7.6 指針數組311.8 結構和聯合321.8.1 結構定義321.8.2 結構類型變量的定義331.8.3 結構類型變量的初始化341.8.4 結構類型變量的引用341.8.5 聯合341.9 枚舉361.9.1 枚舉的定義361.9.2 枚舉元素的值371.9. 3 枚舉變量的使用371.10 類型定義381.10.1 類型定義的形式381.10.2 類型定義的使用381.11 位運算391.11.1 位運算符391.11.2 位域401.12 預處理功能411.12.1 簡單宏定義和帶參數宏定義411.12.2 文件包含431.12.3 條件編譯命令44第2章 C430--MSP430系列的C語言2.1 MSP430系列的C語言452.1.1 C430概述452.1.2 C430程序設計工作流程462.1.3 開始462.1.4 C430程序生成472.2 C430的數據表達482.2.1 數據類型482.2.2 編碼效率502.3 C430的配置512.3.1 引言512.3. 2 存儲器分配522.3.3 堆棧體積522.3.4 輸入輸出522.3.5 寄存器的訪問542.3.6 堆體積542.3.7 初始化54第3章 C430的開發調試環境3.1 引言563.1.1 Workbench特性563.1.2 Workbench的內嵌編輯器特性563.1.3 C編譯器特性573.1. 4 匯編器特性573.1.5 連接器特性583.1.6 庫管理器特性583.1.7 C?SPY調試器特性593.2 Workbench概述593.2.1 項目管理模式593.2.2 選項設置603.2.3 建立項目603.2.4 測試代碼613.2.5 樣本應用程序613.3 Workbench的操作623.3.1 開始633.3.2 編譯項目683.3.3 連接項目693.3.4 調試項目713.3.5 使用Make命令733.4 Workbench的功能匯總753.4.1 Workbench的窗口753.4.2 Workbench的菜單功能813.5 Workbench的內嵌編輯器993.5.1 內嵌編輯器操作993.5.2 編輯鍵說明993.6 C?SPY概述1013.6.1 C?SPY的C語言級和匯編語言級調試1013.6.2 程序的執行1023.7 C?SPY的操作1033.7.1 程序生成1033.7.2 編譯與連接1033.7.3 C?SPY運行1033.7.4 C語言級調試1043.7.5 匯編級調試1113.8 C?SPY的功能匯總1133.8.1 C?SPY的窗口1133.8.2 C?SPY的菜單命令功能1203.9 C?SPY的表達式與宏1323.9.1 匯編語言表達式1323.9.2 C語言表達式1333.9.3 C?SPY宏1353.9.4 C?SPY的設置宏1373.9.5 C?SPY的系統宏137 第4章 C430程序設計實例4.1 程序設計與調試環境1434.1.1 程序設計調試集成環境1434.1.2 設備連接1444.1.3 ProF149實驗系統1444.2 數值計算1454.2.1 C語言表達式1454.2.2 利用MPY實現運算1464.3 循環結構1474.4 選擇結構1484.5 SFR訪問1494.6 RAM訪問1504.7 FLASH訪問1514.8 WDT操作1534.8. 1 WDT使程序自動復位1534.8.2 程序對WATCHDOG計數溢出的控制1544.8.3 WDT的定時器功能1554.9 Timer操作1554.9.1 用Timer產生時鐘信號1554.9.2 用Timer檢測脈沖寬度1564.10 UART操作1574.10.1 點對點通信1574.10.2 點對多點通信1604.11 SPI操作1634.12 比較器操作1654.13 ADC12操作1674.13.1 單通道單次轉換1674.13.2 序列通道多次轉換1684.14 時鐘模塊操作1704.15 中斷服務程序1714.16 省電工作模式1754.17 調用匯編語言子程序1764.17.1 程序舉例1764.17.2 生成C程序調用的匯編子程序177第5章 C430的擴展特性5.1 C430的語言擴展概述1785.1.1 擴展關鍵字1785.1.2 #pragma編譯命令1785.1.3 預定義符號1795.1.4 本征函數1795.1.5 其他擴展特性1795.2 C430的關鍵字擴展1795.2.1 interrupt1805.2.2 monitor1805.2.3 no_init1815.2.4 sfrb1815.2.5 sfrw1825.3 C430的 #pragma編譯命令1825.3.1 bitfields=default1825.3.2 bitfields=reversed1825.3.3 codeseg1835.3.4 function=default1835.3.5 function=interrupt1845.3.6 function=monitor1845.3.7 language=default1845.3.8 language=extended1845.3.9 memory=constseg1855.3.10 memory=dataseg1855.3.11 memory=default1855.3.12 memory=no_init1865.3.13 warnings=default1865.3.14 warnings=off1865.3.15 warnings=on1865.4 C430的預定義符號1865.4.1 DATE1875.4.2 FILE1875.4.3 IAR_SYSTEMS_ICC1875.4.4 LINE1875.4.5 STDC1875.4.6 TID1875.4.7 TIME1885.4.8 VER1885.5 C430的本征函數1885.5.1 _args＄1885.5.2 _argt＄1895.5.3 _BIC_SR1895.5.4 _BIS_SR1905.5.5 _DINT1905.5.6 _EINT1905.5.7 _NOP1905.5.8 _OPC1905.6 C430的匯編語言接口1915.6.1 創建匯編子程序框架1915.6.2 調用規則1915.6.3 C程序調用匯編子程序1935.7 C430的段定義1935.7.1 存儲器分布與段定義1945.7.2 CCSTR段1945.7.3 CDATA0段1945.7.4 CODE段1955.7.5 CONST1955.7.6 CSTACK1955.7.7 CSTR1955.7.8 ECSTR1955.7.9 IDATA01965.7.10 INTVEC1965.7.11 NO_INIT1965.7.12 UDATA0196第6章 C430的庫函數6.1 引言1976.1.1 庫模塊文件1976.1.2 頭文件1976.1.3 庫定義匯總1976.2C 庫函數參考2046.2.1 C庫函數的說明格式2046.2.2 C庫函數說明204第7章 C430編譯器的診斷消息7.1 編譯診斷消息的類型2307.2 編譯出錯消息2317.3 編譯警告消息243附錄 AMSP430系列FLASH型芯片資料248附錄 BProF149實驗系統251附錄 CMSP430x14x.H文件253附錄 DIAR MSP430 C語言產品介紹275
上傳時間： 2014-05-05
上傳用戶：253189838
All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.For input signals, which do not provide the required rise/fall times, external circuitry mustbe used to shape the signal transitions.In the attached diagram, the effect of the sample rate is shown. The numbers 1 to 5 in thediagram represent possible sample points. Waveform a) shows the result if the inputsignal transition time through the undefined TTL-level area is less than the time distancebetween the sample points (sampling at 1, 2, 3, and 4). Waveform b) can be the result ifthe sampling is performed more than once within the undefined area (sampling at 1, 2, 5,3, and 4).Sample points:1. Evaluation of the signal clearly results in a low level2. Either a low or a high level can be sampled here. If low is sampled, no transition willbe detected. If the sample results in a high level, a transition is detected, and anappropriate action (e.g. capture) might take place.3. Evaluation here clearly results in a high level. If the previous sample 2) had alreadydetected a high, there is no change. If the previous sample 2) showed a low, atransition from low to high is detected now.
上傳時間： 2013-10-23
上傳用戶：copu
All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.
上傳時間： 2014-04-02
上傳用戶：han_zh
